公开(公告)号：US11664792B1

公开(公告)日：2023-05-30

申请号：US17830365

申请日：2022-06-02

Applicant: ASPEED Technology Inc.

Inventor： Chin-Ting Kuo ,  Chih-Chiang Mao

IPC: H03K5/135 ,  H03K19/003 ,  H03K19/20

CPC classification number: H03K5/135 ,  H03K19/003 ,  H03K19/20

Abstract: An electronic device and data transmission protection device thereof are provided. The data transmission protection device includes an input clock signal detector and a control signal generator. The input clock signal detector receives a reference clock signal, and detects a frequency of an input clock signal provided by a host end according to the reference clock signal, and frequencies of the reference clock signal and the input clock signal are different. The control signal generator enables a generated control signal when the frequency of the input clock signal is larger than a safety setting value. The control signal is used to disable the host end to perform a data accessing operation on a protected circuit.

公开(公告)号：US11616909B2

公开(公告)日：2023-03-28

申请号：US17115215

申请日：2020-12-08

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen Lu

IPC: H04N5/232 ,  G03B37/04 ,  G06T3/40

Abstract: A method of compensating for color differences between adjacent lens images in a panoramic image is disclosed. The method comprises: calculating color differences of each pair of character regions between any two adjacent lens images out of multiple lens images from a multiple-lens camera according to average color values of the character regions, each character region having a character point; determining color adjustment amounts of character points in each lens image according to the color differences of each pair of character regions; calculating a color adjustment amount of an element according to positions of the element and its two adjacent character points and the color adjustment amounts of the two adjacent character points.

公开(公告)号：US11595574B1

公开(公告)日：2023-02-28

申请号：US17564985

申请日：2021-12-29

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen Lu

IPC: H04N5/232 ,  G06T7/80 ,  G06T3/00 ,  H04N5/225

Abstract: An image processing system is disclosed, comprising: an M-lens camera, a compensation device and a correspondence generator. The M-lens camera generates M lens images. The compensation device generates a projection image according to a first vertex list and the M lens images. The correspondence generator is configured to conduct calibration for vertices to define vertex mappings, horizontally and vertically scan each lens image to determine texture coordinates of its image center, determine texture coordinates of control points according to the vertex mappings, and P1 control points in each overlap region in the projection image; and, determine two adjacent control points and a coefficient blending weight for each vertex in each lens image according to the texture coordinates of the control points and the image center in each lens image to generate the first vertex list, where M>=2.

公开(公告)号：US20230006851A1

公开(公告)日：2023-01-05

申请号：US17534378

申请日：2021-11-23

Applicant: ASPEED Technology Inc.

Inventor： Chen-Wei Chou

IPC: H04L12/18 ,  H04N7/15 ,  G06F16/78 ,  G06F16/783

Abstract: A method and a device for viewing a conference are provided. In the method, after a wide-view video of a specific conference, related conference event data, and speech content of each participant are obtained, a highlight video of the specific conference is correspondingly generated. Accordingly, the efficiency of conference viewing is improved.

公开(公告)号：US20220283979A1

公开(公告)日：2022-09-08

申请号：US17542501

申请日：2021-12-06

Applicant: ASPEED Technology Inc.

Inventor： Hung-Ming Lin ,  Chih-Chiang Mao

IPC: G06F13/42

Abstract: An adaptive serial general-purpose input output (ASGPIO) interface and a signal receiver thereof suitable for a secure control module (SCM) are provided. The ASGPIO interface includes a signal transmitter. The signal transmitter includes a first data buffer, a comparator, and an encoder. The first data buffer receives transmitted data and provides previously transmitted data. The comparator receives currently transmitted data and receives the previously transmitted data. In a first mode, the comparator compares the previously transmitted data with the currently transmitted data to generate a data variation information. The encoder, in the first mode, generates at least one index value and a corresponding instruction signal according to the data variation information. The signal transmitter sends the at least one index value as a serial signal and the instruction signal to a signal receiver.

公开(公告)号：US10013369B2

公开(公告)日：2018-07-03

申请号：US14928983

申请日：2015-10-30

Applicant: ASPEED Technology Inc.

Inventor： Chien-Chou Chen

IPC: G06F11/00 ,  G06F13/16 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/1605 ,  G06F13/4068 ,  G06F13/4282

Abstract: A server system is disclosed. The server system comprises a host system, at least one hard disk (HD) drive, a host bus adapter (HBA), at least one indicator, a storage enclosure processor (SEP), a baseboard management controller (BMC) and a snoop device. The HBA is used to issue a bus signal in a format suitable for transmission over a serial bus according to the received drive state from the at least one HD drive and send the bus signal over the serial bus. The SEP receives the bus signal over the serial bus and drives the at least one indicator to corresponding states. The BMC is coupled to a network. The snoop device detects the bus signal over the serial bus and sends a warning signal to the BMC when a drive failure event is detected.

公开(公告)号：US09857865B2

公开(公告)日：2018-01-02

申请号：US14965650

申请日：2015-12-10

Applicant: ASPEED Technology Inc.

Inventor： Chung-Yen Lu ,  Hung-Ming Lin

IPC: G06F1/32 ,  G01R21/133 ,  G06F9/50 ,  H04L29/08

CPC classification number: G06F1/3287 ,  G01R21/133 ,  G06F1/3206 ,  G06F1/329 ,  G06F9/5083 ,  H04L67/1023 ,  Y02D10/171 ,  Y02D10/24

Abstract: A power measurement circuit is disclosed. The power measurement circuit comprises a sampling register, a latch generator, an accumulation unit, a calculation unit and an output register. The sampling register samples an input signal based on a sampling clock to generate a binary digit. The latch generator generates a latch signal based on the sampling clock and a measurement interval. The accumulation unit accumulates the binary digit based on the latch signal to generate a sum value. The calculation unit calculates an ON-phase rate of the input signal according to the sum value and the measurement interval. The output register stores a power consumption value according to the ON-phase rate of the input signal.

公开(公告)号：US20140344431A1

公开(公告)日：2014-11-20

申请号：US13895905

申请日：2013-05-16

Applicant: ASPEED Technology Inc.

Inventor： FU-CHOU HSU ,  HUNG-JU HUANG ,  Chung-Yen LU

IPC: H04L12/24

CPC classification number: H04L41/044 ,  H04L41/0213

Abstract: A baseboard management system suitable for use in a high density server system is provided. The baseboard management system comprises: a plurality of baseboard management controller (BMC) node respectively located on the servers; and, a main BMC coupled to a network and to the BMC nodes through a communication link for executing a management software; wherein each BMC node is connected with a corresponding host processor and with server board peripherals individually on a corresponding server; and wherein the main BMC in cooperation with the BMC nodes is used to manage the servers remotely.

Abstract translation: 提供了适用于高密度服务器系统的基板管理系统。 基板管理系统包括：分别位于服务器上的多个基板管理控制器（BMC）节点; 以及通过用于执行管理软件的通信链路耦合到网络和BMC节点的主BMC; 其中每个BMC节点与对应的主机处理器和服务器主板外围设备分别连接在相应的服务器上; 并且其中与BMC节点协作的主BMC用于远程管理服务器。

公开(公告)号：US20140125685A1

公开(公告)日：2014-05-08

申请号：US13669762

申请日：2012-11-06

Applicant: ASPEED TECHNOLOGY INC.

Inventor： Kuo-Wei YEH ,  Chung-Yen LU

IPC: G09G5/393

CPC classification number: G09G5/393 ,  G09G5/399 ,  G09G2320/103

Abstract: A method and apparatus for displaying images is disclosed. The method of the invention includes the steps of: transferring a content of a first one of the display buffers to the display device; overwriting a second one of the display buffers with first image data, wherein the first image data represent data of updated pixels between two corresponding adjacent frames; obtaining a bit-map mask according to the updated pixels, wherein the bit-map mask indicates altered pixels for the two corresponding adjacent frames; and, then overwriting the second one of the display buffers with second image data from the other display buffers according to at least one bit-map mask.

Abstract translation: 公开了一种用于显示图像的方法和装置。 本发明的方法包括以下步骤：将显示缓冲器中的第一个显示缓冲器的内容传送到显示设备; 用第一图像数据重写第二个显示缓冲器，其中第一图像数据表示两个对应的相邻帧之间的更新的像素的数据; 根据所述更新的像素获得位图掩模，其中所述位映射掩码指示所述两个对应的相邻帧的改变的像素; 然后根据至少一个位图掩码，用来自其它显示缓冲器的第二图像数据重写第二个显示缓冲器。

公开(公告)号：US08700807B2

公开(公告)日：2014-04-15

申请号：US13536399

申请日：2012-06-28

Applicant: Hung-Ju Huang ,  Shu-An Huang Ho ,  Jen-Min Yuan

Inventor： Hung-Ju Huang ,  Shu-An Huang Ho ,  Jen-Min Yuan

IPC: G06F3/00 ,  G06F12/00 ,  G06F12/02 ,  G06F9/34

CPC classification number: G06F11/3089 ,  G06F11/3003 ,  G06F11/3058 ,  G06F13/385

Abstract: A baseboard management controller is disclosed. The baseboard management controller adapted to monitor a host comprises a baseboard management control module, a memory controller and a video graphic array (VGA) module. The VGA module comprises a video controller, a decoder, a select circuit and a mapping circuit. The decoder receives a transaction signal from a first local bus and decodes a first address signal contained in the transaction signal. The select circuit selectively transfers data from one of the microprocessor bus, the video controller and the memory controller back to the first local bus according to a control signal. The mapping circuit being connected with the decoder maps the first address signal and a second address signal to a third address signal, updates the first address signal and transfers an updated transaction signal.

Abstract translation: 公开了一种基板管理控制器。 适用于监控主机的基板管理控制器包括基板管理控制模块，存储器控制器和视频图形阵列（VGA）模块。 VGA模块包括视频控制器，解码器，选择电路和映射电路。 解码器从第一本地总线接收事务信号，并对包含在事务信号中的第一地址信号进行解码。 选择电路根据控制信号有选择地将数据从微处理器总线，视频控制器和存储器控制器之一传送回第一局部总线。 与解码器连接的映射电路将第一地址信号和第二地址信号映射到第三地址信号，更新第一地址信号并传送更新的事务信号。