Host Device and Method for Securely Booting the Host Device with Operating System Code Loaded From a Storage Device
    42.
    发明申请
    Host Device and Method for Securely Booting the Host Device with Operating System Code Loaded From a Storage Device 有权
    使用从存储设备加载的操作系统代码来安全地引导主机设备的主机设备和方法

    公开(公告)号:US20120042376A1

    公开(公告)日:2012-02-16

    申请号:US12853924

    申请日:2010-08-10

    IPC分类号: H04L9/32 G06F15/177

    摘要: A host device and method for securely booting the host device with operating system code loaded from a storage device are provided. In one embodiment, a host device is in communication with a storage device having a private memory area storing boot loader code and a public memory area storing operating system code. The host device instructs the storage device to initiate a boot mode and receives the boot loader code from the storage device. The host device executes the boot loader code which performs a security check and executes the operating system code loaded from the storage device only if the security check is successful.

    摘要翻译: 提供了一种用于使用从存储设备加载的操作系统代码安全地引导主机设备的主机设备和方法。 在一个实施例中,主机设备与具有存储引导加载程序代码的专用存储区域和存储操作系统代码的公共存储区域的存储设备通信。 主机设备指示存储设备启动引导模式,并从存储设备接收引导加载程序代码。 主机设备执行执行安全检查的引导加载程序代码,并且只有在安全检查成功时才执行从存储设备加载的操作系统代码。

    Optimized non-volatile storage systems
    43.
    发明授权
    Optimized non-volatile storage systems 有权
    优化的非易失性存储系统

    公开(公告)号:US07926720B2

    公开(公告)日:2011-04-19

    申请号:US12166533

    申请日:2008-07-02

    IPC分类号: G06K7/08

    摘要: A memory card that adapts its operation according to the application to which it applied or the conditions under which it is operated. This allows the card to dynamical self optimize. In a first set of embodiments, the card uses host profiling where it will learn about the host during host-card interactions and the card's controller will optimize its algorithms accordingly. In another set of embodiments, the host and card will report to one another their capabilities for a quality of service negotiation. A further set of embodiments allows the storage device to memorize access sequences issued by the host under various predefined conditions, such as host reset or a power on boot sequence. The storage device can use this information to optimize operation for the expected commands. On deviation from an expected sequence, the device would memorize the new command sequence and save it, thus operating in a self-adaptive manner.

    摘要翻译: 一种存储卡,根据其应用的应用或操作条件来适应其操作。 这样可以让卡片进行动态自我优化。 在第一组实施例中,卡使用主机分析,其中将在主机卡交互期间了解主机,并且卡的控制器将相应地优化其算法。 在另一组实施例中,主机和卡将彼此报告其服务质量协商的能力。 另一组实施例允许存储设备在诸如主机复位或引导顺序的电源的各种预定条件下存储由主机发出的访问序列。 存储设备可以使用该信息来优化预期命令的操作。 在偏离预期序列时,设备将记忆新的命令序列并保存,从而以自适应的方式运行。

    NON-VOLATILE MEMORY SYSTEM WITH SELF TEST CAPABILITY
    44.
    发明申请
    NON-VOLATILE MEMORY SYSTEM WITH SELF TEST CAPABILITY 有权
    具有自我测试能力的非易失性存储器系统

    公开(公告)号:US20110022898A1

    公开(公告)日:2011-01-27

    申请号:US12901267

    申请日:2010-10-08

    IPC分类号: G06F11/16 G11C29/00

    CPC分类号: G06F11/267

    摘要: In a non-volatile memory system, test data may be retrieved by means of a circuit without the help of firmware. The circuit is triggered into action when it detects an abnormality in the processor or host interface. In such event, it formats the self test or status signals from the various blocks in the non-volatile memory system controller and sends a test message to the outside world without the assistance of the system processor or interface controller. When implemented in memory systems with multiple data lines, only one of the data lines may be utilized for such purpose, thereby allowing the testing to be performed while the system is still performing data transfer. Preferably, the system includes the test mode communication controller, which can select between a test channel and a host interface channel for the test message transfer so that the same testing may be performed when the memory system is in the test package as well as in an encapsulated package. The test message is transmitted repeatedly and the test message is structured so that it is easier for the receiver host to decipher the message without a handshake with the memory system. A communication controller preferably detects whether any of the communication channels is not used by the controller of a non-volatile memory system for sending signals and sends diagnostic signals through such channel.

    摘要翻译: 在非易失性存储器系统中,测试数据可以通过电路在没有固件的帮助下检索。 当它检测到处理器或主机接口中的异常时,电路被触发成动作。 在这种情况下,它会从非易失性存储器系统控制器中的各个块格式化自检或状态信号,并且在没有系统处理器或接口控制器的帮助的情况下向外界发送测试消息。 当在具有多个数据线的存储器系统中实现时,只有一条数据线可以用于此目的,从而允许在系统仍在执行数据传输时执行测试。 优选地,系统包括测试模式通信控制器,其可以在测试信道和用于测试消息传送的主机接口信道之间进行选择,使得当存储器系统处于测试包中时也可以执行相同的测试 封装包装。 测试消息被重复发送,并且测试消息被构造为使得接收者主机更容易解密消息而不与存储器系统进行握手。 通信控制器优选地检测用于发送信号的非易失性存储器系统的控制器是否没有使用任何通信信道,并且通过这样的信道发送诊断信号。

    Multi-purpose non-volatile memory card
    45.
    发明授权
    Multi-purpose non-volatile memory card 有权
    多用途非易失性存储卡

    公开(公告)号:US07554842B2

    公开(公告)日:2009-06-30

    申请号:US10886302

    申请日:2004-07-06

    IPC分类号: G11C16/04

    摘要: A flash non-volatile memory system that normally operates its memory cells in multiple storage states is provided with the ability to operate some selected or all of its memory cell blocks in two states instead. The two states are selected to be the furthest separated of the multiple states, thereby providing an increased margin during two state operation. This allows faster programming and a longer operational life of the memory cells being operated in two states when it is more desirable to have these advantages than the increased density of data storage that multi-state operation provides. An exemplary embodiment is as a memory card where the user can choice between two state and multi-state operation.

    摘要翻译: 具有通常在多个存储状态下操作其存储器单元的闪存非易失性存储器系统具有以两种状态操作其一些所选或全部存储单元块的能力。 两个状态被选择为多个状态中最远的分离状态,从而在两个状态操作期间提供增加的余量。 这允许当多状态操作提供的数据存储器的密度增加时更有希望具有这些优点时,更快的编程和较长的存储器单元的操作寿命处于两种状态。 一个示例性实施例是存储卡,其中用户可以在两个状态和多状态操作之间进行选择。

    Memory device with circuitry for writing data of an atomic transaction
    46.
    发明申请
    Memory device with circuitry for writing data of an atomic transaction 审中-公开
    具有用于写入原子事务数据的电路的存储器件

    公开(公告)号:US20080320253A1

    公开(公告)日:2008-12-25

    申请号:US11820670

    申请日:2007-06-19

    IPC分类号: G06F12/00

    摘要: A memory device with circuitry for writing data of an atomic transaction is disclosed. In one embodiment, data of an atomic transaction is written to a first memory in a memory device. A determination is made regarding whether all of the data of the atomic transaction was written to the first memory. The data of the atomic transaction is read from the first memory and written to a second memory in the memory device only if it is determined that all of the data of the atomic transaction was written to the first memory.

    摘要翻译: 公开了一种具有用于写入原子事务的数据的电路的存储器件。 在一个实施例中,原子事务的数据被写入存储器件中的第一存储器。 确定原子事务的所有数据是否被写入第一存储器。 仅当确定原子事务的所有数据被写入到第一存储器时,才从第一存储器读取原子事务的数据并将其写入存储器件中的第二存储器。

    Flash controller cache architecture
    47.
    发明授权
    Flash controller cache architecture 有权
    闪存控制器缓存架构

    公开(公告)号:US07408834B2

    公开(公告)日:2008-08-05

    申请号:US11671394

    申请日:2007-02-05

    IPC分类号: G11C8/00

    摘要: A buffer cache interposed between a non-volatile memory and a host may be partitioned into segments that may operate with different policies. Cache policies include write-through, write back and read-look-ahead. Write-through and write back policies may improve speed. Read-look-ahead cache allows more efficient use of the bus between the buffer cache and non-volatile memory. A session command allows data to be maintained in volatile memory by guaranteeing against power loss.

    摘要翻译: 介于非易失性存储器和主机之间的缓冲器高速缓存可被划分成可以不同策略操作的段。 缓存策略包括直写,回写和预读。 直写和回写策略可能会提高速度。 预读高速缓存允许在缓冲器高速缓存和非易失性存储器之间更有效地使用总线。 会话命令允许通过保证防止功率损耗来将数据保存在易失性存储器中。

    Memory Cards with End of Life Recovery and Resizing
    48.
    发明申请
    Memory Cards with End of Life Recovery and Resizing 有权
    存储卡终止恢复和调整大小

    公开(公告)号:US20080082726A1

    公开(公告)日:2008-04-03

    申请号:US11536192

    申请日:2006-09-28

    申请人: Reuven Elhamias

    发明人: Reuven Elhamias

    IPC分类号: G06F12/00

    摘要: A system and methods are given for providing information on the amount of life remaining for a memory having a limited lifespan, such as a flash memory card. For example, it can provide a user with the amount of the memory's expected remaining lifetime in real time units or as a percentage of estimated initial life. An end of life warning can also be provided. The memory device can be resized by host command. In an exemplary embodiment, a host can send a request to the memory device obtain its status and the size of logical units with which it operates. Based on this information, portions of the memory device can be erased, after which it can be reformatted and operated with a reduce capacity.

    摘要翻译: 给出了提供关于具有有限寿命的存储器(例如闪存卡)的剩余寿命的信息的系统和方法。 例如,它可以向用户提供实时单位中存储器预期剩余寿命的量,或作为估计的初始寿命的百分比。 也可以提供生命警告的结束。 可通过主机命令调整存储设备的大小。 在示例性实施例中,主机可以向存储器件发送请求以获得其状态以及其操作的逻辑单元的大小。 基于该信息,可以擦除存储器件的部分,之后可以以减小容量重新格式化和操作。

    Flash controller cache architecture
    49.
    发明授权
    Flash controller cache architecture 有权
    闪存控制器缓存架构

    公开(公告)号:US07173863B2

    公开(公告)日:2007-02-06

    申请号:US10796575

    申请日:2004-03-08

    IPC分类号: G11C7/00

    摘要: A buffer cache interposed between a non-volatile memory and a host may be partitioned into segments that may operate with different policies. Cache policies include write-through, write and read-look-ahead. Write-through and write back policies may improve speed. Read-look-ahead cache allows more efficient use of the bus between the buffer cache and non-volatile memory. A session command allows data to be maintained in volatile memory by guaranteeing against power loss.

    摘要翻译: 介于非易失性存储器和主机之间的缓冲器高速缓存可被划分成可以不同策略操作的段。 缓存策略包括直写,写入和预读。 直写和回写策略可能会提高速度。 预读高速缓存允许在缓冲器高速缓存和非易失性存储器之间更有效地使用总线。 会话命令允许通过保证防止功率损耗来将数据保存在易失性存储器中。