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    Method and system for see-through image correction in image duplication
    44.
    发明授权
    Method and system for see-through image correction in image duplication 失效
    图像复制中透视图像校正的方法和系统

    公开(公告)号：US07064863B2

    公开(公告)日：2006-06-20

    申请号：US09847192

    申请日：2001-05-02

    Applicant: Hiroaki Fukuda ,  Yuji Takahashi ,  Hiroyuki Kawamoto ,  Rie Ishii ,  Hideto Miyazaki ,  Shinya Miyazaki ,  Sugitaka Oteki ,  Takeharu Tone ,  Fumio Yoshizawa ,  Yoshiyuki Namizuka ,  Yasuyuki Nomizu

    Inventor： Hiroaki Fukuda ,  Yuji Takahashi ,  Hiroyuki Kawamoto ,  Rie Ishii ,  Hideto Miyazaki ,  Shinya Miyazaki ,  Sugitaka Oteki ,  Takeharu Tone ,  Fumio Yoshizawa ,  Yoshiyuki Namizuka ,  Yasuyuki Nomizu

    IPC: G06F15/00 ,  H04N1/00

    CPC classification number: H04N1/4095

    Abstract: To solve problems associated with undesirable duplication of see-through back image in a double-sided input document, a method of and a system for substantially eliminating the undesirable see-through back images initially scanns a front side image and a back side image from the double-sided document and store the scanned images. The front side image has portions, and some of the portions include an original front image as well as a see-through back image from the back side image. An edge amount for each of the portions is determined in the front side image. The see-through back images are separated from the original front images based upon the edge amount. To further improve the correct removal of the undesired see-through back image, the above processed portions having a certain edge are smoothed. Character portions and dot pattern portions are further separated from background portions in the smoothed data. Finally, the intensity level of the character portions, the dot pattern portions and the background portions are adjusted by a corresponding predetermined conversion function so as to substantially eliminate the see-through back image.

    Abstract translation: 为了解决与双面输入文档中的透视背景图像的不期望的重复相关的问题，基本上消除不期望的透视背面图像的方法和系统最初扫描来自图像的前侧图像和背面图像 双面文档并存储扫描图像。 前侧图像具有部分，并且一些部分包括原始正面图像以及来自背面图像的透视后部图像。 在前侧图像中确定每个部分的边缘量。 基于边缘量，透视后的图像与原始前部图像分离。 为了进一步改善不期望的透明背景图像的正确去除，上述具有一定边缘的处理部分被平滑化。 字符部分和点图案部分在平滑数据中与背景部分进一步分离。 最后，通过相应的预定转换功能来调整字符部分，点图形部分和背景部分的强度水平，以便基本上消除透视背景图像。

    Semiconductor device having output buffer circuit in which impedance thereof can be controlled
    47.
    发明授权
    Semiconductor device having output buffer circuit in which impedance thereof can be controlled 有权
    具有能够控制其阻抗的输出缓冲电路的半导体装置

    公开(公告)号：US09130556B2

    公开(公告)日：2015-09-08

    申请号：US13618639

    申请日：2012-09-14

    Applicant: Chiaki Dono ,  Takenori Sato ,  Shinya Miyazaki

    Inventor： Chiaki Dono ,  Takenori Sato ,  Shinya Miyazaki

    IPC: H03L5/00 ,  H03K19/00 ,  H03K19/0185

    CPC classification number: H03K19/0005 ,  H03K19/018521 ,  H03K19/018528

    Abstract: Disclosed herein is a device that includes a first buffer circuit coupled between a first power supply line and a data terminal and a second buffer circuit coupled between a second power supply line and the data terminal. First and second internal data signals complementary to each other are supplied to a level shifter, thereby third and fourth internal data signals complementary to each other are generated by changing amplitude values of the first and second internal data signals. The first and the second buffer circuits are controlled based on the third and fourth internal data signals such that one of the first and second buffer circuits turns on and the other of the first and second buffer circuits turns off.

    Abstract translation: 这里公开了一种装置，其包括耦合在第一电源线和数据终端之间的第一缓冲电路和耦合在第二电源线和数据终端之间的第二缓冲电路。 彼此互补的第一和第二内部数据信号被提供给电平移位器，从而通过改变第一和第二内部数据信号的振幅值来产生彼此互补的第三和第四内部数据信号。 基于第三和第四内部数据信号控制第一和第二缓冲电路，使得第一和第二缓冲电路中的一个导通，第一和第二缓冲电路中的另一个断开。

    Semiconductor device generates complementary output signals
    48.
    发明授权
    Semiconductor device generates complementary output signals 失效
    半导体器件产生互补的输出信号

    公开(公告)号：US08653874B2

    公开(公告)日：2014-02-18

    申请号：US13610541

    申请日：2012-09-11

    Applicant: Takenori Sato ,  Shinya Miyazaki

    Inventor： Takenori Sato ,  Shinya Miyazaki

    IPC: H03H11/16

    CPC classification number: H03K5/151

    Abstract: A splitter circuit in a semiconductor device includes a first inverter that receives an input signal and outputs an inverted signal, a second inverter that receives the inverted signal and outputs a non-inverted signal (a first output signal), a third inverter that receives the input signal and outputs an inverted signal (a second output signal) and an auxiliary inverter that shares an output signal line with the third inverter. The third inverter and the auxiliary inverter use an inverted signal of the input signal as power supplies.

    Abstract translation: 半导体器件中的分路器电路包括接收输入信号并输出​​反相信号的第一反相器，接收反相信号并输出​​非反相信号（第一输出信号）的第二反相器，接收第 输出信号并输出​​与第三反相器共享输出信号线的反相信号（第二输出信号）和辅助逆变器。 第三个逆变器和辅助逆变器使用输入信号的反相信号作为电源。

    SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFER CIRCUIT IN WHICH IMPEDANCE THEREOF CAN BE CONTROLLED
    49.
    发明申请
    SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFER CIRCUIT IN WHICH IMPEDANCE THEREOF CAN BE CONTROLLED 有权
    具有可控制输入阻抗的输出缓冲电路的半导体器件

    公开(公告)号：US20130083609A1

    公开(公告)日：2013-04-04

    申请号：US13617447

    申请日：2012-09-14

    Applicant: Chiaki DONO ,  Shinya MIYAZAKI

    Inventor： Chiaki DONO ,  Shinya MIYAZAKI

    IPC: G11C7/10

    CPC classification number: G11C7/1057

    Abstract: Disclosed herein is a device that includes first and second buffer circuits electrically connected to a terminal and an output control circuit activating the first buffer circuit and deactivating the second buffer circuit in a first state and activating one of the first and second buffer circuits and deactivating the other of the first and second buffer circuits based on input data in a second state. The output control circuit is brought into one of the first and second states.

    Abstract translation: 本文公开了一种装置，其包括电连接到端子的第一和第二缓冲电路以及启动第一缓冲电路的输出控制电路，并且在第一状态下去激活第二缓冲电路，并激活第一和第二缓冲电路之一， 基于处于第二状态的输入数据的第一和第二缓冲电路中的另一个。 输出控制电路进入第一和第二状态之一。

    SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFER CIRCUIT IN WHICH IMPEDANCE THEREOF CAN BE CONTROLLED
    50.
    发明申请
    SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFER CIRCUIT IN WHICH IMPEDANCE THEREOF CAN BE CONTROLLED 有权
    具有可控制输入阻抗的输出缓冲电路的半导体器件

    公开(公告)号：US20130082758A1

    公开(公告)日：2013-04-04

    申请号：US13618639

    申请日：2012-09-14

    Applicant: Chiaki DONO ,  Takenori SATO ,  Shinya MIYAZAKI

    Inventor： Chiaki DONO ,  Takenori SATO ,  Shinya MIYAZAKI

    IPC: H03L5/00

    CPC classification number: H03K19/0005 ,  H03K19/018521 ,  H03K19/018528

    Abstract: Disclosed herein is a device that includes a first buffer circuit coupled between a first power supply line and a data terminal and a second buffer circuit coupled between a second power supply line and the data terminal. First and second internal data signals complementary to each other are supplied to a level shifter, thereby third and fourth internal data signals complementary to each other are generated by changing amplitude values of the first and second internal data signals. The first and the second buffer circuits are controlled based on the third and fourth internal data signals such that one of the first and second buffer circuits turns on and the other of the first and second buffer circuits turns off.

    Abstract translation: 这里公开了一种装置，其包括耦合在第一电源线和数据终端之间的第一缓冲电路和耦合在第二电源线和数据终端之间的第二缓冲电路。 彼此互补的第一和第二内部数据信号被提供给电平移位器，从而通过改变第一和第二内部数据信号的振幅值来产生彼此互补的第三和第四内部数据信号。 基于第三和第四内部数据信号控制第一和第二缓冲电路，使得第一和第二缓冲电路中的一个导通，第一和第二缓冲电路中的另一个断开。

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