Suspended cantilever waveguide
    41.
    发明授权

    公开(公告)号:US11221447B1

    公开(公告)日:2022-01-11

    申请号:US16794759

    申请日:2020-02-19

    Abstract: Cantilevered waveguides suspended above an air cavity in an underlying substrate are described. The waveguide is formed by patterning a waveguide layer in some embodiments, and the air cavity is formed by etching the substrate beneath the waveguide. The topside of the air cavity may be sealed by filling the openings used to etch the cavity with a sealant, such as optical epoxy. In some embodiments, the waveguide is a facet coupler, positioned at a chip facet.

    Substrate cavity
    47.
    发明授权

    公开(公告)号:US10209539B1

    公开(公告)日:2019-02-19

    申请号:US15858051

    申请日:2017-12-29

    Abstract: A method for making an apparatus, a system, and apparatus, the apparatus and system each comprising a substrate with a top side, wherein the substrate has a set of cavities in the top side of the substrate, wherein the substrate has a set of conductive elements on the top side of the substrate arranged to electrically couple with a set of conductive elements of a photonic integrated circuit (PIC), wherein each cavity of the set of cavities when coupled to the PIC creates a surface tension when exposed to an underfill to cause the underfill to flow around each cavity.

    Integration of electronic chips onto a photonic chip

    公开(公告)号:US09726840B2

    公开(公告)日:2017-08-08

    申请号:US14298846

    申请日:2014-06-06

    Inventor: Long Chen

    CPC classification number: G02B6/4274 H01L2924/0002 Y10T29/49126 H01L2924/00

    Abstract: Methods, structures, apparatus, devices, and materials to facilitate the integration of electronic integrated circuits (chips) including drivers, amplifiers, microcontrollers, etc., onto/into photonic integrated circuits (chips) using recessed windows exhibiting controlled depths onto/into the photonic chip. The electronic chips are positioned into the recessed windows and electrical connections between the electronic chips and the photonic chip are achieved by flip-chip techniques with predefined traces at a bottom of the recessed windows or direct wire bonding. Advantageously, this integration may be performed on a wafer level for large-volume productions.

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