Method for reducing surface oxide in polysilicon processing
    41.
    发明授权
    Method for reducing surface oxide in polysilicon processing 失效
    多晶硅加工中减少表面氧化物的方法

    公开(公告)号:US06436760B1

    公开(公告)日:2002-08-20

    申请号:US09838418

    申请日:2001-04-19

    IPC分类号: H01L218242

    CPC分类号: H01L27/10861 H01L21/32132

    摘要: A method for removing surface oxide from polysilicon includes depositing a very thin layer of germanium (e.g. monolayers in thickness) over the polysilicon immediately before a subsequent polysilicon deposition step, and then heating the germanium-coated polysilicon in a vacuum to sublime (remove) volatile germanium oxide. This method is applied to formation of a trench capacitor, which uses either doped amorphous silicon or doped amorphous SiGe material in the formation of the electrodes.

    摘要翻译: 用于从多晶硅去除表面氧化物的方法包括在随后的多晶硅沉积步骤之前在多晶硅上沉积非常薄的锗层(例如,厚度为单层),然后在真空中加热锗覆盖的多晶硅以升华(除去)挥发性 氧化锗。 该方法适用于沟槽电容器的形成,其在电极形成中使用掺杂的非晶硅或掺杂的非晶SiGe材料。

    PATTERN INDEPENDENT Si:C SELECTIVE EPITAXY
    45.
    发明申请
    PATTERN INDEPENDENT Si:C SELECTIVE EPITAXY 失效
    图案独立Si:C选择性外观

    公开(公告)号:US20100035419A1

    公开(公告)日:2010-02-11

    申请号:US12189344

    申请日:2008-08-11

    IPC分类号: H01L21/20

    摘要: Trenches are formed in a silicon substrate by etching exposed portions of the silicon substrate. After covering areas on which deposition of Si:C containing material is to be prevented, selective epitaxy is performed in a single wafer chamber at a temperature from about 550° C. to about 600° C. employing a limited carrier gas flow, i.e., at a flow rate less than 12 standard liters per minute to deposit Si:C containing regions at a pattern-independent uniform deposition rate. The inventive selective epitaxy process for Si:C deposition provides a relatively high net deposition rate a high quality Si:C crystal in which the carbon atoms are incorporated into substitutional sites as verified by X-ray diffraction.

    摘要翻译: 通过蚀刻硅衬底的暴露部分在硅衬底中形成沟槽。 在覆盖要防止沉积含Si:C的材料的区域之后,使用有限的载气流在约550℃至约600℃的温度下,在单晶片室中进行选择性外延,即, 以小于12标准升/分钟的流速,以不依赖于图案的均匀沉积速率沉积含Si:C的区域。 用于Si:C沉积的本发明的选择性外延工艺提供了相对较高的净沉积速率,其中通过X射线衍射验证碳原子并入到取代位置的高质量Si:C晶体。

    Low temperature LPCVD PSG/BPSG process
    48.
    发明授权
    Low temperature LPCVD PSG/BPSG process 失效
    低温LPCVD PSG / BPSG工艺

    公开(公告)号:US06429149B1

    公开(公告)日:2002-08-06

    申请号:US09511394

    申请日:2000-02-23

    IPC分类号: H01L2131

    摘要: A disclosed process use low pressure chemical vapor deposition (LPCVD) of doped oxide film on a substrate. The process includes the steps of providing a substrate in an LPCVD reactor and flowing BTBAS and oxygen into the LPCVD reactor to react on the substrate to deposit an oxide film on the substrate. A doped precursor is flowed into the LPCVD reactor to dope the oxide film as it is deposited on the substrate. This process produces doped oxide film at a relatively low LPCVD reaction temperature.

    摘要翻译: 所公开的方法使用在衬底上的掺杂氧化物膜的低压化学气相沉积(LPCVD)。 该方法包括以下步骤:在LPCVD反应器中提供衬底并将BTBAS和氧气流入LPCVD反应器以在衬底上反应以在衬底上沉积氧化物膜。 掺杂的前体流入LPCVD反应器以在氧化膜沉积在衬底上时掺杂氧化膜。 该方法在相对低的LPCVD反应温度下产生掺杂的氧化物膜。

    Borophosphosilicate glass incorporated with fluorine for low thermal
budget gap fill
    49.
    发明授权
    Borophosphosilicate glass incorporated with fluorine for low thermal budget gap fill 失效
    掺有氟的硼磷硅玻璃用于低热量预算缺口填充

    公开(公告)号:US6159870A

    公开(公告)日:2000-12-12

    申请号:US210411

    申请日:1998-12-11

    摘要: A method of depositing a fluorinated borophosphosilicate glass (FBPSG) on a semiconductor device as either a final or interlayer dielectric film. Gaps having aspect ratios greater than 6:1 are filled with a substantially void-free FBPSG film at a temperature of about 480.degree. C. at sub-atmospheric pressures of about 200 Torr. Preferably, gaseous reactants used in the method comprise TEOS, FTES, TEPO and TEB with an ozone/oxygen mixture. Dopant concentrations of boron and phosphorus are sufficiently low such that surface crystallite defects and hygroscopicity are avoided. The as-deposited films at lower aspect ratio gaps are substantially void-free such that subsequent anneal of the film is not required. Films deposited into higher aspect ratio gaps are annealed at or below about 750.degree. C., well within the thermal budget for most DRAM, logic and merged logic-DRAM chips. The resultant FBPSG layer contains less than or equal to about 5.0 wt % boron, less than about 4.0 wt % phosphorus, and about 0.1 to 2.0 wt % fluorine.

    摘要翻译: 在半导体器件上沉积氟化硼磷硅酸盐玻璃(FBPSG)作为最终或层间绝缘膜的方法。 纵横比大于6:1的间隙在约200托的亚大气压下,在约480℃的温度下填充基本上无空隙的FBPSG膜。 优选地,在该方法中使用的气态反应物包括具有臭氧/氧混合物的TEOS,FTES,TEPO和TEB。 硼和磷的掺杂浓度足够低,从而避免表面微晶缺陷和吸湿性。 较低纵横比间隙的沉积膜基本上无空隙,使得不需要膜的后续退火。 沉积在较高纵横比间隙中的膜在大约750℃或更低温度下退火,完全在大多数DRAM,逻辑和合并逻辑DRAM芯片的热预算内。 所得的FBPSG层含有小于或等于约5.0重量%的硼,小于约4.0重量%的磷和约0.1至2.0重量%的氟。

    Methods and apparatus for filling high aspect ratio structures with
silicate glass
    50.
    发明授权
    Methods and apparatus for filling high aspect ratio structures with silicate glass 失效
    用硅酸盐玻璃填充高纵横比结构的方法和装置

    公开(公告)号:US6077786A

    公开(公告)日:2000-06-20

    申请号:US854011

    申请日:1997-05-08

    摘要: Filling of narrow and/or high aspect ratio gaps and trenches with silicate glass is accomplished at reduced temperatures and without reflow by etching the glass concurrently with thermal chemical vapor deposition of the glass such that the deposition rate will exceed the etching rate by a relatively small net deposition rate near the surface with the excess deposition rate increasing over the depth of the trench or gap. The as-deposited glass film is made dense and stable by carrying out the concurrent etch and deposition process at an elevated temperature but which is within the maximum temperature and heat budget which can be tolerated by structures formed by previously performed processes. Fluorine can be incorporated in the silicate glass film as a dopant in sufficient concentration to reduce dielectric constant of the film. Phosphorus and/or boron can be incorporated into the film, as well, and may enhance void-free filling of trenches and gaps.

    摘要翻译: 使用硅酸盐玻璃填充窄和/或高长宽比的间隙和沟槽在降低的温度下完成,并且通过在玻璃的热化学气相沉积中同时蚀刻玻璃而不进行回流,使得沉积速率将超过蚀刻速率相对较小 表面附近的净沉积速率随着沟槽或间隙的深度而增加。 通过在升高的温度下进行同时蚀刻和沉积工艺,但是在由先前执行的工艺形成的结构可以容忍的最大温度和热量预算范围内,将沉积的玻璃膜制成致密和稳定的。 氟可以以足够的浓度掺入到硅酸盐玻璃膜中作为掺杂剂以降低膜的介电常数。 也可以将磷和/或硼掺入到膜中,并且可以增强沟槽和间隙的无空隙填充。