公开(公告)号：US20180261452A1

公开(公告)日：2018-09-13

申请号：US15915853

申请日：2018-03-08

申请人： TOKYO ELECTRON LIMITED

发明人： Kenji OUCHI

IPC分类号： H01L21/02 ,  H01J37/32 ,  C23C16/04 ,  C23C16/30

CPC分类号： H01L21/02131 ,  C23C16/04 ,  C23C16/30 ,  C23C16/45523 ,  C23C16/509 ,  C23C16/513 ,  C23C16/515 ,  H01J37/3211 ,  H01J37/32449 ,  H01J37/32467 ,  H01J37/32724 ,  H01J2237/3321 ,  H01J2237/334 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/6833

摘要： A film forming method for a target object including a main surface and grooves formed in the main surface, includes a step of supplying of a first gas into the processing chamber, and a step of supplying a second gas and a high frequency power for plasma generation into the processing chamber to generate in the processing chamber a plasma of a gas including the second gas in the processing chamber. The first gas contains an oxidizing agent that does not include a hydrogen atom. The second gas contains a compound that includes one or more silicon atoms and one or more fluorine atoms and does not include a hydrogen atom. A film containing silicon and oxygen is selectively formed on the main surface of the target object except the grooves.

公开(公告)号：US09887314B2

公开(公告)日：2018-02-06

申请号：US15178274

申请日：2016-06-09

申请人： LG ELECTRONICS INC.

发明人： Youngsung Yang ,  Hyungjin Kwon ,  Chungyi Kim ,  Junghoon Choi

IPC分类号： H01L21/00 ,  H01L31/18 ,  H01L31/0216 ,  H01L31/068 ,  H01L21/02

CPC分类号： H01L31/1868 ,  H01L21/02131 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02337 ,  H01L31/02167 ,  H01L31/0682 ,  H01L31/1864 ,  Y02E10/547

摘要： Disclosed is a method of manufacturing a solar cell. The method includes forming a protective film using an insulation film over a semiconductor substrate, the semiconductor substrate including a base area of a first conductive type and formed of crystalline silicon. The forming of the protective film includes a heat treatment process performed at a heat treatment temperature of 600 degrees Celsius or more under a gas atmosphere including a halogen gas, which has a halogen element.

公开(公告)号：US20170092588A1

公开(公告)日：2017-03-30

申请号：US15127924

申请日：2015-03-09

申请人： ZEON CORPORATION

发明人： Kotaro Miyatani ,  Takuya Kurotori ,  Kohei Kawamura

IPC分类号： H01L23/532 ,  H01L21/768 ,  H01L23/528

CPC分类号： H01L23/53233 ,  C23C16/045 ,  C23C16/401 ,  H01L21/02131 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/76802 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76883 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A film forming method according to a first embodiment includes a formation step of forming wiring in a groove and/or a hole formed in an insulating film containing fluorine by using wiring metal containing a dopant for preventing intrusion of the fluorine from the insulating film. The film forming method according to a first embodiment further includes a step of performing heat treatment after the wiring is formed, whereby a high concentration portion containing the dopant in a concentration higher than inside the wiring is formed on an interface of the wiring.

公开(公告)号：US20170011957A1

公开(公告)日：2017-01-12

申请号：US15119289

申请日：2015-04-29

申请人： CSMC TECHNOLOGIES FAB1 CO., LTD.

发明人： Zhiyong WANG ,  Dejin WANG ,  Jingjing MA

IPC分类号： H01L21/768 ,  H01L27/12 ,  H01L23/528 ,  H01L21/02 ,  H01L23/532

CPC分类号： H01L21/76834 ,  H01L21/02131 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/76801 ,  H01L23/5283 ,  H01L23/53295 ,  H01L27/1248 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is an intermetallic dielectric layer structure of a silicon-on-insulator device, comprising a silicon-rich oxide layer (54) covering a metal interconnect, a fluorine-silicon glass layer on the silicon-rich oxide layer, and a non-doped silicate glass layer on the fluorine-silicon glass layer; the thickness of the silicon-rich oxide layer (54) is 700 angstroms ±10%; the silicon-rich oxide layer having a greater thickness captures movable ions on an unsaturated bond, such that it is difficult for the movable ions to pass through the silicon-rich oxide layer, thus blocking the movable ions. The present invention has good performance in an integrity evaluation of the gate oxide layer, and avoids damage to the device caused by the aggregation of movable ions at an interface. Also provided are a silicon-on-insulator device and a method of manufacturing the intermetallic dielectric layer of the silicon-on-insulator device.

摘要翻译： 提供一种绝缘体上硅器件的金属间介电层结构，其包括覆盖金属互连的富硅氧化物层（54），富硅氧化物层上的氟硅玻璃层和非掺杂氧化物层 氟硅玻璃层上的硅酸盐玻璃层; 富硅氧化物层（54）的厚度为700埃±10％; 具有较大厚度的富硅氧化物层捕获不饱和键上的可移动离子，使得可移动离子难以通过富硅氧化物层，从而阻挡可移动离子。 本发明在栅极氧化物层的完整性评价中具有良好的性能，并且避免了由界面处的可移动离子聚集引起的器件损坏。 还提供了绝缘体上硅器件和制造绝缘体上硅器件的金属间介电层的方法。

公开(公告)号：US20160071971A1

公开(公告)日：2016-03-10

申请号：US14820555

申请日：2015-08-07

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： CHIAKI KUDOU ,  HARUYUKI SORADA ,  TSUNEICHIRO SANO

IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L29/423 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/535 ,  H01L29/08 ,  H01L29/66

CPC分类号： H01L29/7802 ,  H01L21/02131 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/32134 ,  H01L21/32137 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/42356 ,  H01L29/42376 ,  H01L29/66712 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: semiconductor layer having an impurity region of a first conductivity type; a gate insulating layer, at least a part of the gate insulating layer positioned on the semiconductor layer; a gate electrode positioned on the gate insulating layer and having a first surface in contact with the part of the gate insulating film and a second surface opposite to the first surface; an interlayer insulating layer covering the gate electrode; and an electrode in contact with the impurity region. The gate electrode has a recess at a corner in contact with the second surface, in a cross section of the gate electrode perpendicular to a surface of the semiconductor layer. A cavity surrounded by the gate electrode and the interlayer insulating layer is positioned in a region including at least a part of the recess.

摘要翻译： 半导体器件包括：具有第一导电类型的杂质区的半导体层; 栅极绝缘层，栅绝缘层的至少一部分位于半导体层上; 位于所述栅极绝缘层上并且具有与所述栅极绝缘膜的所述部分接触的第一表面和与所述第一表面相对的第二表面的栅电极; 覆盖栅电极的层间绝缘层; 和与杂质区接触的电极。 栅电极在垂直于半导体层的表面的栅电极的截面中具有与第二表面接触的角部的凹部。 由栅电极和层间绝缘层包围的空腔位于包括凹部的至少一部分的区域中。

公开(公告)号：US08278740B2

公开(公告)日：2012-10-02

申请号：US13078478

申请日：2011-04-01

申请人： Satoshi Toriumi ,  Noriyoshi Suzuki

发明人： Satoshi Toriumi ,  Noriyoshi Suzuki

IPC分类号： H01L23/58

CPC分类号： H01L21/3145 ,  C23C16/308 ,  C23C16/45523 ,  H01L21/02131 ,  H01L21/0214 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31629

摘要： An object of the present invention is to provide a semiconductor device including an insulating layer with a high dielectric strength voltage, a low dielectric constant, and low hygroscopicity. Another object of the present invention is to provide an electronic appliance with high performance and high reliability, which uses the semiconductor device. An insulator containing nitrogen, such as silicon oxynitride or silicon nitride oxide, and an insulator containing nitrogen and fluorine, such as silicon oxynitride added with fluorine or silicon nitride oxide added with fluorine, are alternately deposited so that an insulating layer is formed. By sandwiching an insulator containing nitrogen and fluorine between insulators containing nitrogen, the insulator containing nitrogen and fluorine can be prevented from absorbing moisture and thus a dielectric strength voltage can be increased. Further, an insulator contains fluorine so that a dielectric constant can be reduced.

摘要翻译： 本发明的目的是提供一种包括具有高介电强度电压，低介电常数和低吸湿性的绝缘层的半导体器件。 本发明的另一个目的是提供一种使用该半导体器件的具有高性能和高可靠性的电子设备。 交替地沉积包含氮的绝缘体，例如氮氧化硅或氮氧化硅，以及添加有添加了氟的氟或氮氧化硅的氮氧化物等氮和氟的绝缘体，从而形成绝缘层。 通过在包含氮的绝缘体之间夹持含有氮和氟的绝缘体，可以防止含有氮和氟的绝缘体吸收水分，从而可以提高介电强度电压。 此外，绝缘体含有氟，使得可以降低介电常数。

公开(公告)号：US07955994B2

公开(公告)日：2011-06-07

申请号：US12243164

申请日：2008-10-01

申请人： Satoshi Toriumi ,  Noriyoshi Suzuki

发明人： Satoshi Toriumi ,  Noriyoshi Suzuki

IPC分类号： H01L21/469

CPC分类号： H01L21/3145 ,  C23C16/308 ,  C23C16/45523 ,  H01L21/02131 ,  H01L21/0214 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31629

摘要： An object of the present invention is to provide a semiconductor device including an insulating layer with a high dielectric strength voltage, a low dielectric constant, and low hygroscopicity. Another object of the present invention is to provide an electronic appliance with high performance and high reliability, which uses the semiconductor device. An insulator containing nitrogen, such as silicon oxynitride or silicon nitride oxide, and an insulator containing nitrogen and fluorine, such as silicon oxynitride added with fluorine or silicon nitride oxide added with fluorine, are alternately deposited so that an insulating layer is formed. By sandwiching an insulator containing nitrogen and fluorine between insulators containing nitrogen, the insulator containing nitrogen and fluorine can be prevented from absorbing moisture and thus a dielectric strength voltage can be increased. Further, an insulator contains fluorine so that a dielectric constant can be reduced.

摘要翻译： 本发明的目的是提供一种包括具有高介电强度电压，低介电常数和低吸湿性的绝缘层的半导体器件。 本发明的另一个目的是提供一种使用该半导体器件的具有高性能和高可靠性的电子设备。 交替地沉积包含氮的绝缘体，例如氮氧化硅或氮氧化硅，以及添加有添加了氟的氟或氮氧化硅的氮氧化物等氮和氟的绝缘体，从而形成绝缘层。 通过在包含氮的绝缘体之间夹持含有氮和氟的绝缘体，可以防止含有氮和氟的绝缘体吸收水分，从而可以提高介电强度电压。 此外，绝缘体含有氟，使得可以降低介电常数。

公开(公告)号：US07910484B2

公开(公告)日：2011-03-22

申请号：US11972895

申请日：2008-01-11

申请人： Chester T. Dziobkowski ,  Thomas F. Houghton ,  Emily Kinser ,  Darryl D. Restaino ,  Yun-Yu Wang

发明人： Chester T. Dziobkowski ,  Thomas F. Houghton ,  Emily Kinser ,  Darryl D. Restaino ,  Yun-Yu Wang

IPC分类号： H01L21/302 ,  H01L21/461 ,  H01L21/311

CPC分类号： H01L21/31612 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02131 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/3145 ,  H01L21/3148 ,  H01L21/31629

摘要： A method of forming a TEOS oxide layer over an nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer formed on a substrate. The method includes forming the nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer on a top surface and a top side beveled edge proximate to the top surface of a substrate; removing or preventing formation of a carbon-rich layer on a bottom side bevel edge region proximate to a bottom surface of the substrate or converting the carbon-rich layer to nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide; and forming the TEOS oxide layer on the top surface, the top side beveled edge and the bottom side bevel edge region of the substrate.

摘要翻译： 在形成在衬底上的氮掺杂碳化硅或氮掺杂氢化碳化硅层上形成TEOS氧化物层的方法。 该方法包括在靠近衬底顶表面的顶表面和顶侧倾斜边缘上形成氮掺杂碳化硅或氮掺杂氢化碳化硅层; 去除或防止在靠近衬底的底表面的底侧斜边缘区域上形成富碳层，或将富碳层转化为氮掺杂碳化硅或氮掺杂氢化碳化硅; 以及在所述基板的顶面，顶侧倾斜边缘和底侧斜边缘区域上形成TEOS氧化物层。

公开(公告)号：US07910457B2

公开(公告)日：2011-03-22

申请号：US12078084

申请日：2008-03-27

申请人： Shunpei Yamazaki

发明人： Shunpei Yamazaki

IPC分类号： H01L21/30

CPC分类号： H01L21/31662 ,  H01L21/02131 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02321 ,  H01L21/02351 ,  H01L21/02362 ,  H01L21/76254

摘要： It is an object to provide a method for manufacturing a semiconductor substrate in which contamination of a semiconductor layer due to an impurity is prevented and the bonding strength between a support substrate and the semiconductor layer can be increased. An oxide film containing first halogen is formed on a surface of a semiconductor substrate, and the semiconductor substrate is irradiated with ions of second halogen, whereby a separation layer is formed and the second halogen is contained in a semiconductor substrate. Then, heat treatment is performed in a state in which the semiconductor substrate and the support substrate are superposed with an insulating surface containing hydrogen interposed therebetween, whereby part of the semiconductor substrate is separated along the separation layer, so that a semiconductor layer containing the second halogen is provided over the support substrate.

摘要翻译： 本发明的目的是提供一种制造半导体衬底的方法，其中防止了由于杂质导致的半导体层的污染，并且可以增加支撑衬底和半导体层之间的接合强度。 在半导体衬底的表面上形成含有第一卤素的氧化物膜，并且用第二卤素离子照射半导体衬底，由此形成分离层，并且第二卤素包含在半导体衬底中。 然后，在半导体衬底和支撑衬底被叠置在其间插入氢的绝缘表面的状态下进行热处理，由此半导体衬底的一部分沿着分离层分离，使得包含第二 卤素设置在支撑基板上。

公开(公告)号：US07645677B2

公开(公告)日：2010-01-12

申请号：US10598961

申请日：2004-05-28

申请人： Tomoyuki Watanabe ,  Atsushi Yoshinouchi

发明人： Tomoyuki Watanabe ,  Atsushi Yoshinouchi

IPC分类号： H01L21/76

CPC分类号： H01L21/02129 ,  H01L21/02131 ,  H01L21/3165 ,  H01L21/76232 ,  H01L21/76801 ,  H01L21/76837 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing semiconductor device according to the present invention comprises a first film forming step of forming, on a concave and convex portion formed by an element on a semiconductor substrate, an oxidation preventive layer which prevents permeation of moisture into the element; a second film forming step of forming, on this oxidation preventive layer, an expansion layer which can be oxidized and expanded by a heat treatment in an oxidation atmosphere; a third film forming step of forming, on this expansion layer, an insulating film which can be fluidized by the heat treatment in the oxidation atmosphere; and an expansion step of subjecting, to the heat treatment in the oxidation atmosphere, the semiconductor substrate on which the oxidation preventive layer, the expansion layer and the insulating film have been formed, to fluidize the insulating film and to oxidize and expand the expansion layer, thereby eliminating bubbles generated in the insulating film.

摘要翻译： 根据本发明的制造半导体器件的方法包括：第一膜形成步骤，在由半导体衬底上的元件形成的凹凸部上形成防止水分渗透到元件中的防氧化层; 在该氧化防止层上形成能够在氧化气氛中进行热处理而被氧化膨胀的膨胀层的第二成膜工序; 在该膨胀层上形成能够在氧化气氛中通过热处理而流化的绝缘膜的第三成膜工序; 以及在氧化气氛中对其上形成有氧化层，膨胀层和绝缘膜的半导体衬底进行热处理以使绝缘膜流化并使膨胀层氧化和膨胀的膨胀步骤 从而消除在绝缘膜中产生的气泡。