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公开(公告)号：US20190057638A1
公开(公告)日：2019-02-21
申请号：US15768948
申请日：2017-10-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jiha KIM , Seung Woo HAN , Guangliang SHANG , Xing YAO , Haoliang ZHENG , Mingfu HAN , Zhichong WANG , Lijun YUAN , Yun Sik IM , Jing LV , Yinglong HUANG , Xue DONG
Abstract: A shift-buffer circuit, a gate driving circuit, a display panel, a display device, and a driving method. The shift-buffer circuit includes: a shift register and a plurality of buffers connected with the shift register. The shift register includes a shift output terminal; the shift register is configured to output a shift output signal from the shift output terminal, in response to a shift clock signal; each of the buffers includes a buffer input terminal and a buffer output terminal, the buffer input terminal being connected with the shift output terminal; each of the buffers is configured to output a buffer output signal from the buffer output terminal, in response to a buffer clock signal.
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公开(公告)号：US20180261177A1
公开(公告)日：2018-09-13
申请号：US15796463
申请日：2017-10-27
Applicant: BOE Technology Group Co., Ltd.
Inventor： Mingfu HAN , Xing YAO , Guangliang SHANG , Haoliang ZHENG , Seung-Woo HAN , Jiha KIM , Lijun YUAN , Zhichong WANG
CPC classification number: G09G3/3677 , G06F3/0412 , G06F3/0416 , G09G2310/0286 , G09G2310/0291 , G09G2310/08 , G09G2330/021 , G09G2340/0407 , G11C19/28
Abstract: The present disclosure discloses a gate drive circuit, a display panel and a driving method for the gate drive circuit. The gate drive circuit includes a plurality of shift register units connected in cascade; and further includes: buffer units which are in a one-to-one correspondence with shift register units at all levels, and touch control switch units which are in a one-to-one correspondence with shift register units at even levels. Each buffer unit in the gate drive circuit can increase the holding time of the effective pulse signal output by the shift register unit at a corresponding level by one line before resetting, and the effective pulse signal output by a buffer unit at an even level under the control of a touch control unit and the effective pulse signal output by a buffer unit at an adjacent previous odd level are reset at the same time.
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公开(公告)号：US20180025695A1
公开(公告)日：2018-01-25
申请号：US15656419
申请日：2017-07-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Mingfu HAN , Guangliang SHANG , Seungwoo HAN , Zhihe JIN , Xing YAO , Haoliang ZHENG , Lijun YUAN , Zhichong WANG
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2330/08
Abstract: The present invention discloses a gate driver on array circuit and a driving method thereof, and a display device. The gate driver on array circuit comprises a first gate driver on array sub-circuit and a second gate driver on array sub-circuit; the first gate driver on array sub-circuit is configured to drive in a first working state which is a state in which no defect occurs in the first gate driver on array sub-circuit; the second gate driver on array sub-circuit is configured to drive in a second working state which is a state in which a defect occurs in the first gate driver on array sub-circuit. The present invention improves the yield rate of the gate driver on array circuit.
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44.发明申请公开(公告)号：US20160049126A1
公开(公告)日：2016-02-18
申请号：US14436932
申请日：2014-07-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yuanbo ZHANG , Jiayang ZHAO , Seung Woo HAN , Xing YAO , Haifeng JIN
CPC classification number: G09G3/3648 , G06F3/0416 , G09G3/36 , G09G3/3674 , G09G3/3696 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , G11C19/00 , G11C19/28 , G11C19/287
Abstract: The present disclosure provides a shift register unit, a gate electrode drive circuit and a display apparatus, which relates to a technical field of display. The shift register unit includes an input reset module, a pull up module, a control module and a pull down module. By inputting a high level into the second signal input end of the input reset module in the touch scan to maintain the level at the pull up control node, the electrical leak effects at the pull up control node may be avoided efficiently. In this way, the defects of insufficient charging rate of the row pixels may be avoided and the dark lines or bad bright lines may be suppressed.
Abstract translation: 本公开提供了一种与显示技术领域有关的移位寄存器单元，栅电极驱动电路和显示装置。 移位寄存器单元包括输入复位模块，上拉模块，控制模块和下拉模块。 通过在触摸扫描中将高电平输入到输入复位模块的第二信号输入端以维持上拉控制节点处的电平，可以有效地避免上拉控制节点处的电泄漏效应。 以这种方式，可以避免行像素充电速率不足的缺陷，并且可以抑制暗线或不良亮线。
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公开(公告)号：US20250157413A1
公开(公告)日：2025-05-15
申请号：US19023695
申请日：2025-01-16
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing YAO , Chen XU , Jingquan WANG , Xinyin WU
IPC: G09G3/3266 , H10K59/126 , H10K59/131
Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, a gate scan driving circuit, a light-emitting control scan driving circuit, a first power line, a first planarization layer, a second planarization layer and a first shielding layer, a second shielding layer and a plurality of touch traces. The first planarization layer and the second planarization layer further include an open slot. An orthographic projection of at least part of the touch traces on the base substrate falls into the open slot. In an area of the open slot, an orthographic projection of the second shielding layer on the base substrate overlaps with an orthographic projection of a part of the touch traces on the base substrate.
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Patent Agency Ranking
公开(公告)号：US20250140208A1
公开(公告)日：2025-05-01
申请号：US19011447
申请日：2025-01-06
Inventor： Miao LIU , Xueguang HAO , Libin LIU , Teng CHEN , Xinyin WU , Yong QIAO , Xing YAO , Jingquan WANG
IPC: G09G3/3266 , G09G3/20 , G09G3/3233 , G11C19/28 , H10K59/121 , H10K59/126
Abstract: The display substrate includes a shift register arranged on a base substrate, the shift register includes multiple stages of driving circuits, the driving circuit includes a first/second input circuit, a first/second output circuit and a control circuit; the first output circuit is configured to provide a first scanning driving signal to the first driving signal output terminal under the control of a potential of a first node and a potential of a second node; the first input circuit is configured to input a signal to the third node under the control of the clock signal; the second input circuit is configured to input a signal provided by the power line to the second node under the control of the potential of the third node; the control circuit is configured to control the potential of the third node and the potential of the first node.
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公开(公告)号：US20250124877A1
公开(公告)日：2025-04-17
申请号：US18578059
申请日：2023-04-28
Applicant: Hefei BOE Joint Technology Co., Ltd. , BOE TECHNOLOGY GROUP CO., LTD. , Beijing BOE Technology Development Co., Ltd.
Inventor： Xuehuan FENG , Yongqian LI , Xing YAO
IPC: G09G3/3266 , G11C19/28
Abstract: A shift register is provided and includes a display input reset circuit, an inverter circuit, at least one output circuit and a first detection circuit; the display input reset circuit, the inverter circuit and the output circuit are connected to a pull-up node; the inverter circuit and the at least one output circuit are connected to a pull-down node; the first detection circuit is connected to a signal acquisition point, an acquisition control terminal, and a first signal detection line, and configured to acquire a voltage at the signal acquisition point in response to a signal from the acquisition control terminal and output a detection voltage corresponding to the acquired voltage to the first signal detection line, an external first chip adjusts an active level voltage from the third power supply terminal according to the detection voltage; the signal acquisition point includes the pull-down node and/or a signal output terminal.
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公开(公告)号：US20250087155A1
公开(公告)日：2025-03-13
申请号：US18576254
申请日：2022-12-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Pan XU , Miao LIU , Xing YAO , Dandan ZHOU , Cheng XU
IPC: G09G3/3233 , H10K59/121 , H10K59/122 , H10K59/131
Abstract: Provided are a display substrate and a driving method thereof. The display substrate includes a first storage circuit and a second storage circuit, a first terminal of the first storage circuit being electrically connected to the control terminal of the driving circuit, a second terminal of the first storage circuit being electrically connected to the first terminal of the driving circuit, and the first storage circuit being configured to store the data signal; a first terminal of the second storage circuit being electrically connected to the first electrode of the light-emitting element and a second terminal of the second storage circuit being electrically connected to a second electrode of the light-emitting element.
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公开(公告)号：US20240282266A1
公开(公告)日：2024-08-22
申请号：US18023712
申请日：2022-01-14
Inventor： Miao LIU , Xing YAO , Yipeng CHEN , Teng CHEN
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2310/08 , G09G2330/021
Abstract: Disclosed is a drive control circuit including an input circuit (10), a first output circuit (11), and a second output circuit (12). The first output circuit (11) is electrically connected with the input circuit (10) and a first output end (OUT1) and is configured to output a first output signal from the first output end (OUT1) under control of the input circuit (11). The second output circuit (12) is electrically connected with the input circuit (10) and a second output end (OUT2), or electrically connected with the first output end (OUT1) and a second output end (OUT2), and is configured to output a second output signal from the second output end (OUT2) under control of the input circuit (10) or the first output end (OUT1). The first output signal is different from the second output signal.
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公开(公告)号：US20240112623A1
公开(公告)日：2024-04-04
申请号：US18275012
申请日：2022-07-08
Inventor： Miao LIU , Xueguang HAO , Jingbo XU , Xing YAO , Jingquan WANG , Xinyin WU , Xinguo LI , Zhichong WANG
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0408 , G09G2300/0426 , G09G2300/0809 , G09G2310/0267
Abstract: A display substrate, comprising a base substrate and a scan drive control circuit which is disposed in a non-display area of the base substrate. The scan drive control circuit comprises an input circuit, an output control circuit, and an output circuit. The output control circuit is connected to the input circuit and the output circuit. The output control circuit comprises a first node control capacitor and a second node control capacitor. The length of the first node control capacitor in a first direction LC1k, the length of the second node control capacitor in the first direction LC2k and the length of the scan drive control circuit in the first direction LY satisfy the following formula:
L
C
1
k
L
Y
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