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公开(公告)号:US20180025695A1
公开(公告)日:2018-01-25
申请号:US15656419
申请日:2017-07-21
发明人: Mingfu HAN , Guangliang SHANG , Seungwoo HAN , Zhihe JIN , Xing YAO , Haoliang ZHENG , Lijun YUAN , Zhichong WANG
IPC分类号: G09G3/36
CPC分类号: G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2330/08
摘要: The present invention discloses a gate driver on array circuit and a driving method thereof, and a display device. The gate driver on array circuit comprises a first gate driver on array sub-circuit and a second gate driver on array sub-circuit; the first gate driver on array sub-circuit is configured to drive in a first working state which is a state in which no defect occurs in the first gate driver on array sub-circuit; the second gate driver on array sub-circuit is configured to drive in a second working state which is a state in which a defect occurs in the first gate driver on array sub-circuit. The present invention improves the yield rate of the gate driver on array circuit.
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公开(公告)号:US20180233210A1
公开(公告)日:2018-08-16
申请号:US15503830
申请日:2016-08-25
发明人: Mingfu HAN , Guangliang SHANG , Yuanbo ZHANG , Yujie GAO , Yan YAN , Yingmeng MIAO , Seungwoo HAN , Zhihe JIN , Xing YAO , Haoliang ZHENG
CPC分类号: G11C19/287 , G09G3/20 , G09G2300/0426 , G09G2310/0245 , G09G2310/0267 , G09G2310/0286 , G11C19/28
摘要: A supplement resetting module for a gate driver circuit, including a pull-up control unit, a pull-down control unit, a clock signal input end, a predetermined level input end, a first control signal input end, a second control signal input end and a signal output end. A control end of the pull-up control unit is connected to the clock signal input end, an output end of the pull-up control unit is connected to the signal output end, a first control end of the pull-down control unit is connected to the first control signal input end, a second control end of the pull-down control unit is connected to the second control signal input end, an input end of the pull-down control unit is connected to the predetermined level input end, and an output end of the pull-down control unit is connected to the signal output end.
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3.
公开(公告)号:US20180188562A1
公开(公告)日:2018-07-05
申请号:US15794298
申请日:2017-10-26
发明人: Zhihe JIN , Seungwoo HAN , Mingfu HAN , Xing YAO , Guangliang SHANG , Zhichong WANG , Lijun YUAN , Haoliang ZHENG , Yunsik IM
IPC分类号: G02F1/1335 , G02F1/1343 , G02F1/133
CPC分类号: G02F1/1336 , G02F1/13306 , G02F1/133553 , G02F1/134309 , G02F1/13439 , G02F1/19 , G02F2001/133616 , G02F2001/133618 , G02F2201/12 , G02F2202/10 , G02F2202/101 , G02F2203/02
摘要: The present application discloses a reflective display panel, a driving method thereof, a control method of a pixel unit and a reflective display device. The reflective display panel comprises: a base substrate, a reflective layer, first and second electrode layers, wherein the first electrode layer is on a side of the reflective layer distal to the base substrate, the second electrode layer is on a side of the first electrode layer distal to the base substrate and insulated from the first electrode layer, materials of the first and second electrode layers are each an electro-optic material, and orthogonal projections of the second and first electrode layers on the base substrate have overlapping areas corresponding to the pixel units.
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