公开(公告)号：USD915389S1

公开(公告)日：2021-04-06

申请号：US29665035

申请日：2018-09-28

Applicant: Chien-Ting Lin

Designer： Chien-Ting Lin

公开(公告)号：US10465838B2

公开(公告)日：2019-11-05

申请号：US15355575

申请日：2016-11-18

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: F16M11/34 ,  G03B17/56 ,  F16M11/04

Abstract: Disclosed is a tripod. The tripod comprises a base body, a plurality of tripod tubes and a plurality of connecting components. An end of each tripod tube is pivotally connected to the base body. The plurality of tripod tubes is pivotally operated in relation to the base body either at a folded state or at an expanding state. The other end of the plurality of tripod tubes get being close to each other so as to be folded in the folded state, and the other end of the plurality of tripod tubes get being far from each other so as to be expanding in the expanding state. Each of the plurality of connecting components is pivotally connected between the tripod tubes adjacent to each other. the two connecting elements are pulled by the tripod tubes connected to the two connecting elements in such a manner that the connecting elements are pulled by each other to be a straight line so as to provide a steady force to support the adjacent tripod tubes and thus to provide stable supporting force for a photographic equipment.

公开(公告)号：US09453636B2

公开(公告)日：2016-09-27

申请号：US14108781

申请日：2013-12-17

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: F21V1/06 ,  F21V21/00 ,  G03B15/02 ,  G03B17/56 ,  F21W131/40

CPC classification number: F21V21/00 ,  F21V1/06 ,  F21W2131/40 ,  G03B15/02 ,  G03B17/568

Abstract: The present invention relates to a lighting structure used in photographing or video recording. The lighting structure of the present invention includes four holders, which are disposed around a periphery of the lighting structure and are configured in a symmetrical manner with each other. At least one engaging member is formed between each one of the holder in a predetermined clockwise/counterclockwise direction. The lighting structure of the present invention can be assembled with a light cover. The light cover includes two intersecting supporting rods, which are corresponding to the engaging members. The two intersecting supporting rods can be engaged with the engaging members.

Abstract translation: 本发明涉及用于拍摄或录像的照明结构。 本发明的照明结构包括四个保持器，它们设置在照明结构的周边周围并且彼此对称地配置。 在保持器的每一个之间以预定的顺时针/逆时针方向形成至少一个接合构件。 本发明的照明结构可以用灯罩组装。 灯罩包括两个相交的支撑杆，它们对应于接合构件。 两个相交的支撑杆可以与接合构件接合。

公开(公告)号：US09159626B2

公开(公告)日：2015-10-13

申请号：US13418367

申请日：2012-03-13

Applicant: Chien-Ting Lin ,  Wen-Tai Chiang

Inventor： Chien-Ting Lin ,  Wen-Tai Chiang

IPC: H01L27/088 ,  H01L21/326 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L21/823431 ,  H01L21/82345 ,  H01L21/823821 ,  H01L29/517 ,  H01L29/66545

Abstract: A fin-shaped field-effect transistor process includes the following steps. A substrate is provided. A first fin-shaped field-effect transistor and a second fin-shaped field-effect transistor are formed on the substrate, wherein the first fin-shaped field-effect transistor includes a first metal layer and the second fin-shaped field-effect transistor includes a second metal layer. A treatment process is performed on the first fin-shaped field-effect transistor to adjust the threshold voltage of the first fin-shaped field-effect transistor. A fin-shaped field-effect transistor formed by said process is also provided.

Abstract translation: 鳍状场效应晶体管工艺包括以下步骤。 提供基板。 第一鳍状场效应晶体管和第二鳍状场效应晶体管形成在基板上，其中第一鳍状场效应晶体管包括第一金属层和第二鳍状场效应晶体管 包括第二金属层。 对第一鳍状场效应晶体管进行处理处理，以调整第一鳍状场效应晶体管的阈值电压。 还提供了通过所述方法形成的鳍状场效应晶体管。

公开(公告)号：US20130237046A1

公开(公告)日：2013-09-12

申请号：US13415855

申请日：2012-03-09

Applicant: Chien-Ting Lin ,  Ssu-I Fu

Inventor： Chien-Ting Lin ,  Ssu-I Fu

IPC: H01L21/28

CPC classification number: H01L29/66545 ,  H01L21/823462 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/518 ,  H01L29/78

Abstract: A semiconductor process includes the following steps. A substrate having a first area and a second area is provided. A thick oxide layer and a dummy gate layer are formed on the substrate and in the first area and the second area. The dummy gate layer is removed to expose the thick oxide layer. The thick oxide layer in the first area is removed and then a thinner oxide layer is formed in the first area; or, the thick oxide layer in the first area is thinned down and a thinner oxide layer is therefore formed.

Abstract translation: 半导体工艺包括以下步骤。 提供具有第一区域和第二区域的衬底。 在基板上和第一区域和第二区域中形成厚的氧化物层和伪栅极层。 去除伪栅极层以暴露厚的氧化物层。 去除第一区域中的厚氧化物层，然后在第一区域中形成更薄的氧化物层; 或者，第一区域中的厚氧化物层变薄，因此形成较薄的氧化物层。

公开(公告)号：US20130200470A1

公开(公告)日：2013-08-08

申请号：US13367382

申请日：2012-02-07

Applicant: An-Chi Liu ,  Chun-Hsien Lin ,  Yu-Cheng Tung ,  Chien-Ting Lin ,  Wen-Tai Chiang ,  Shih-Hung Tsai ,  Ssu-I Fu ,  Ying-Tsung Chen ,  Chih-Wei Chen

Inventor： An-Chi Liu ,  Chun-Hsien Lin ,  Yu-Cheng Tung ,  Chien-Ting Lin ,  Wen-Tai Chiang ,  Shih-Hung Tsai ,  Ssu-I Fu ,  Ying-Tsung Chen ,  Chih-Wei Chen

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/7834 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78654

Abstract: A semiconductor structure and a method of fabricating the same comprising the steps of providing a substrate, forming at least one fin structure on said substrate, forming a gate covering said fin structure, forming a plurality of epitaxial structures covering said fin structures, performing a gate pullback process to reduce the critical dimension (CD) of said gate and separate said gate and said epitaxial structures, forming lightly doped drains (LDD) in said fin structures, and forming a spacer on said gate and said fin structures.

Abstract translation: 一种半导体结构及其制造方法，包括以下步骤：提供衬底，在所述衬底上形成至少一个鳍结构，形成覆盖所述鳍结构的栅极，形成覆盖所述鳍结构的多个外延结构， 拉回过程以减小所述栅极的临界尺寸（CD）并分离所述栅极和所述外延结构，在所述鳍结构中形成轻掺杂的漏极（LDD），以及在所述栅极和所述鳍结构上形成间隔物。

公开(公告)号：US20130052781A1

公开(公告)日：2013-02-28

申请号：US13218438

申请日：2011-08-25

Applicant: Sheng-Huei Dai ,  Rai-Min Huang ,  Chen-Hua Tsai ,  Shih-Hung Tsai ,  Chien-Ting Lin

Inventor： Sheng-Huei Dai ,  Rai-Min Huang ,  Chen-Hua Tsai ,  Shih-Hung Tsai ,  Chien-Ting Lin

IPC: H01L21/8232

CPC classification number: H01L29/7851 ,  H01L21/845 ,  H01L27/1207 ,  H01L27/1211 ,  H01L29/66795

Abstract: A method of forming a Non-planar FET is provided. A substrate is provided. An active region and a peripheral region are defined on the substrate. A plurality of VSTI is formed in the active region of the substrate. A part of each VSTI is removed to expose a part of sidewall of the substrate. Then, a conductor layer is formed on the substrate which is then patterned to form a planar FET gate in the peripheral region and a Non-planar FET gate in the active region simultaneously. Last, a source/drain region is formed on two sides of the Non-planar FET gate.

Abstract translation: 提供一种形成非平面FET的方法。 提供基板。 在衬底上限定有源区和周边区。 在基板的有源区域中形成多个VSTI。 去除每个VSTI的一部分以露出衬底的侧壁的一部分。 然后，在衬底上形成导体层，然后将其图案化以在周边区域中形成平面FET栅极，并且在有源区域中同时形成非平面FET栅极。 最后，源极/漏极区域形成在非平面FET栅极的两侧。

公开(公告)号：US08252657B2

公开(公告)日：2012-08-28

申请号：US13072766

申请日：2011-03-27

Applicant: Chih-Yu Tseng ,  Chien-Ting Lin ,  Kun-Szu Tseng ,  Cheng-Wen Fan ,  Victor-Chiang Liang

Inventor： Chih-Yu Tseng ,  Chien-Ting Lin ,  Kun-Szu Tseng ,  Cheng-Wen Fan ,  Victor-Chiang Liang

IPC: H01L21/20 ,  H01L21/8234 ,  H01L21/8244 ,  H01L21/8238 ,  H01L21/8222

CPC classification number: H01L27/0629 ,  H01L21/84 ,  H01L28/20

Abstract: A method for fabricating metal gate transistor and resistor is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation in the substrate of the resistor region; forming a tank in the shallow trench isolation of the resistor region; forming at least one gate in the transistor region and a resistor in the tank of the resistor region; and transforming the gate into a metal gate transistor.

Abstract translation: 公开了一种用于制造金属栅极晶体管和电阻器的方法。 该方法包括以下步骤：提供具有晶体管区域和电阻器区域的衬底; 在电阻器区域的衬底中形成浅沟槽隔离; 在电阻区域的浅沟槽隔离中形成一个槽; 在所述晶体管区域中形成至少一个栅极和在所述电阻器区域的所述槽中形成电阻器; 并将栅极变换为金属栅极晶体管。

公开(公告)号：US08192038B2

公开(公告)日：2012-06-05

申请号：US13191587

申请日：2011-07-27

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: G03B15/02

CPC classification number: G03B15/06

Abstract: A photographic reflector includes an engagement unit, a support frame, a fabric canopy, and a lamp holder. The engagement unit includes an engagement seat and an engagement member moveably mounted in the engagement seat. The support frame includes a plurality of ribs and a plurality of stretchers corresponding to each respective rib. One end of each rib is pivotally connected to the engagement seat. One end of each stretcher is pivotally connected to a preset location of the corresponding rib, and the other end of each stretcher is pivotally connected to the engagement member. The fabric canopy is mounted on the ribs of the support frame and has a reflective layer at an inside thereof and a mounting hole defined at a location close to the engagement unit. The lamp holder is mounted in the mounting hole of the fabric canopy. The photographic reflector can be folded as compactly as desired, easily stored, and convenient in transportation and use.

Abstract translation: 照相反射器包括接合单元，支撑框架，织物罩和灯座。 接合单元包括接合座和可移动地安装在接合座中的接合构件。 支撑框架包括多个肋和对应于每个相应的肋的多个担架。 每个肋的一端枢转地连接到接合座。 每个拉伸器的一端枢转地连接到相应肋的预定位置，并且每个拉伸器的另一端枢转地连接到接合构件。 织物顶篷安装在支撑框架的肋上，并且在其内侧具有反射层，并且在靠近接合单元的位置处限定安装孔。 灯架安装在织物罩的安装孔中。 照相反射体可按要求紧凑地折叠，容易储存，便于运输和使用。

公开(公告)号：US20110171810A1

公开(公告)日：2011-07-14

申请号：US13072766

申请日：2011-03-27

Applicant: Chih-Yu Tseng ,  Chien-Ting Lin ,  Kun-Szu Tseng ,  Cheng-Wen Fan ,  Victor-Chiang Liang

Inventor： Chih-Yu Tseng ,  Chien-Ting Lin ,  Kun-Szu Tseng ,  Cheng-Wen Fan ,  Victor-Chiang Liang

IPC: H01L21/02

CPC classification number: H01L27/0629 ,  H01L21/84 ,  H01L28/20

Abstract: A method for fabricating metal gate transistor and resistor is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation in the substrate of the resistor region; forming a tank in the shallow trench isolation of the resistor region; forming at least one gate in the transistor region and a resistor in the tank of the resistor region; and transforming the gate into a metal gate transistor.

Abstract translation: 公开了一种用于制造金属栅极晶体管和电阻器的方法。 该方法包括以下步骤：提供具有晶体管区域和电阻器区域的衬底; 在电阻器区域的衬底中形成浅沟槽隔离; 在电阻区域的浅沟槽隔离中形成一个槽; 在所述晶体管区域中形成至少一个栅极和在所述电阻器区域的所述槽中形成电阻器; 并将栅极变换为金属栅极晶体管。