LCD display device having dummy pixels
    41.
    发明申请
    LCD display device having dummy pixels 审中-公开
    具有虚拟像素的LCD显示装置

    公开(公告)号:US20070200992A1

    公开(公告)日:2007-08-30

    申请号:US11521777

    申请日:2006-09-15

    CPC classification number: G02F1/1362 G02F1/136213 G02F2001/133388

    Abstract: A display device is provided. The display device includes a display area having display pixels arranged in a matrix shape, and a dummy area that is formed proximate to an edge of the display area and that has a plurality of dummy pixels. Each dummy pixel includes a first electrode, a second electrode for receiving a common voltage, a liquid crystal layer formed between the first electrode and the second electrode, and a voltage supplier for supplying the first voltage to the first electrode. By removing a thin film transistor of a dummy pixel and directly applying a common voltage to a pixel electrode, the thin film transistor of the dummy pixel is destroyed when static electricity is introduced from the outside, thereby preventing static electricity from being introduced to the display area.

    Abstract translation: 提供显示装置。 显示装置包括具有以矩阵形状排列的显示像素的显示区域和靠近显示区域的边缘并且具有多个虚拟像素的虚拟区域。 每个虚拟像素包括第一电极,用于接收公共电压的第二电极,形成在第一电极和第二电极之间的液晶层,以及用于向第一电极提供第一电压的电压供给器。 通过去除虚拟像素的薄膜晶体管并直接对像素电极施加公共电压,当从外部引入静电时,虚拟像素的薄膜晶体管被破坏,从而防止静电被引入显示器 区。

    Level shifter and a display device having the same
    42.
    发明申请
    Level shifter and a display device having the same 有权
    电平移位器和具有该移位器的显示装置

    公开(公告)号:US20070035339A1

    公开(公告)日:2007-02-15

    申请号:US11429297

    申请日:2006-05-05

    CPC classification number: H03K3/356165

    Abstract: A level shifter and a display device having the same are provided. In a level shifter, a first transistor includes a gate electrode receiving a first driving voltage, and a source electrode receiving an input signal through an input terminal. A second transistor includes a drain electrode receiving the first driving voltage, and a source electrode electrically connected to a drain electrode of the first transistor through a first node. A third transistor includes a source electrode receiving a second driving voltage, a drain electrode electrically connected to a gate electrode of the second transistor through a second node, and a gate electrode receiving the input signal. A fourth transistor includes a drain electrode receiving the first driving voltage, a gate electrode electrically connected to the drain electrode of the first transistor through the first node, and a source electrode electrically connected to the drain electrode of the third transistor through the second node. An inverter inverts a signal outputted from the second node to apply the inverted signal to an output terminal.

    Abstract translation: 提供了一种电平移位器和具有该电平移位器的显示装置。 在电平移位器中,第一晶体管包括接收第一驱动电压的栅极电极和通过输入端子接收输入信号的源电极。 第二晶体管包括接收第一驱动电压的漏电极和通过第一节点电连接到第一晶体管的漏电极的源电极。 第三晶体管包括接收第二驱动电压的源电极,通过第二节点电连接到第二晶体管的栅电极的漏电极和接收输入信号的栅电极。 第四晶体管包括接收第一驱动电压的漏电极,通过第一节点电连接到第一晶体管的漏电极的栅电极和通过第二节点电连接到第三晶体管的漏电极的源电极。 反相器将从第二节点输出的信号反相,将反相信号施加到输出端。

    Methods of manufacturing a capacitor and a semiconductor device
    43.
    发明申请
    Methods of manufacturing a capacitor and a semiconductor device 审中-公开
    制造电容器和半导体器件的方法

    公开(公告)号:US20060115954A1

    公开(公告)日:2006-06-01

    申请号:US11265937

    申请日:2005-11-03

    CPC classification number: H01L28/91 H01L27/10817 H01L27/10852

    Abstract: In methods of manufacturing a capacitor and a semiconductor device, a mold layer is formed on a substrate having a contact plug. The mold layer includes an opening exposing the contact plug. A conductive layer is formed on the contact plug, an inner sidewall of the opening and the mold layer. A photoresist pattern is formed to substantially fill the opening. A cylindrical lower electrode is formed by partially removing the conductive layer. The mold layer is selectively removed while the photoresist pattern prevents damage to the lower electrode, the contact plug and the substrate. The photoresist pattern is removed, and then a dielectric layer and an upper electrode are sequentially formed on the lower electrode. Damage to the lower electrode and the contact plug are effectively prevented due to the presence of the photoresist pattern during selective removal of the mold layer.

    Abstract translation: 在制造电容器和半导体器件的方法中,在具有接触插塞的基板上形成模层。 模具层包括露出接触塞的开口。 在接触插塞,开口的内侧壁和模具层上形成导电层。 形成光致抗蚀剂图案以基本上填充开口。 通过部分去除导电层形成圆柱形下电极。 选择性地去除模具层,同时光刻胶图案防止损坏下部电极,接触插塞和基板。 去除光致抗蚀剂图案,然后在下电极上依次形成电介质层和上电极。 由于在选择性去除模具层期间存在光致抗蚀剂图案,因此有效地防止了下电极和接触插塞的损坏。

    Method for fabricating cliche and method for forming pattern using the same
    45.
    发明申请
    Method for fabricating cliche and method for forming pattern using the same 有权
    用于制造立方体的方法和使用该方法形成图案的方法

    公开(公告)号:US20050243233A1

    公开(公告)日:2005-11-03

    申请号:US11114107

    申请日:2005-04-26

    Applicant: Chul-Ho Kim

    Inventor: Chul-Ho Kim

    CPC classification number: G02F1/1362 G02F2001/136295

    Abstract: A method for fabricating a clich{acute over (e,)} including: providing a transparent glass substrate; depositing a metal layer on the substrate; patterning the metal layer and thereby forming a first metal pattern; etching the glass substrate by using the first metal pattern as a mask and thereby forming a first convex pattern; patterning the first metal pattern and thereby forming a second metal pattern; and etching the first convex pattern by using the second metal pattern as a mask and thereby forming a second convex pattern.

    Abstract translation: 一种制造薄片的方法,包括:提供透明玻璃基板; 在衬底上沉积金属层; 图案化金属层,从而形成第一金属图案; 通过使用第一金属图案作为掩模蚀刻玻璃基板,从而形成第一凸起图案; 图案化第一金属图案,从而形成第二金属图案; 并且通过使用第二金属图案作为掩模蚀刻第一凸起图案,从而形成第二凸起图案。

    Thin film transistor array panel for display
    46.
    发明申请
    Thin film transistor array panel for display 有权
    薄膜晶体管阵列显示屏

    公开(公告)号:US20050174846A1

    公开(公告)日:2005-08-11

    申请号:US11002617

    申请日:2004-12-03

    CPC classification number: G02F1/1345 G02F1/136259 H01L27/12

    Abstract: A TFT array panel is provided, including an insulating substrate, gate lines horizontally provided on the insulating substrate, data lines isolated from the gate lines and intersecting the gate lines, a pixel electrode in a pixel region defined by intersecting the gate lines and data lines, a TFT for transmitting or intercepting an image signal transmitted through the plurality of data lines to the pixel electrode in response to a scanning signal transmitted from the plurality of gate lines, a transmission gate for distributing the image signal input from an input line to the plurality of data lines, and a repair line intersecting the input line of the transmission gate. Therefore, since the input repair line and the input line of the transmission gate are intersected, a parasitic capacitance occurring between the repair line and the input line of the transmission gate can be reduced.

    Abstract translation: 提供一种TFT阵列面板,包括绝缘基板,水平设置在绝缘基板上的栅极线,与栅极线隔离并与栅极线相交的数据线,与栅极线和数据线相交的像素区域中的像素电极 ,用于响应于从多条栅极线发送的扫描信号,将通过多条数据线发送的图像信号发送或截取到像素电极的TFT,用于将从输入线输入的图像信号分配到 多个数据线,以及与传输门的输入线相交的修复线。 因此,由于输入修复线和传输门的输入线相交,所以可以减少修复线与传输门输入线之间发生的寄生电容。

    DEVICES INCLUDING FIRST AND SECOND BUFFERS, AND METHODS OF OPERATING DEVICES INCLUDING FIRST AND SECOND BUFFERS
    47.
    发明申请
    DEVICES INCLUDING FIRST AND SECOND BUFFERS, AND METHODS OF OPERATING DEVICES INCLUDING FIRST AND SECOND BUFFERS 审中-公开
    包括第一和第二缓冲区的设备,以及操作设备的方法,包括第一和第二缓冲器

    公开(公告)号:US20160189583A1

    公开(公告)日:2016-06-30

    申请号:US14973296

    申请日:2015-12-17

    CPC classification number: G09G3/20 G09G2310/0275 G09G2330/021 G09G2360/18

    Abstract: Devices that include a logic circuit and first and second buffers are provided. The first buffer is spaced apart from the logic circuit by a first distance (and/or is refreshed in a first cycle), and the second buffer is spaced apart from the logic circuit by a second distance that is shorter than the first distance (and/or is refreshed in a second cycle that is different from the first cycle). Moreover, the logic circuit is configured to output, to the first buffer, first data corresponding to fewer toggles than second data that is output from the logic circuit to the second buffer. Methods of operating the devices are also provided.

    Abstract translation: 提供了包括逻辑电路和第一和第二缓冲器的设备。 第一缓冲器与逻辑电路间隔第一距离(和/或在第一周期中刷新),并且第二缓冲器与逻辑电路隔开比第一距离短的第二距离(和 /或在与第一周期不同的第二周期中刷新)。 此外,逻辑电路被配置为向第一缓冲器输出与从逻辑电路输出到第二缓冲器的第二数据相比较少的切换的第一数据。 还提供了操作设备的方法。

    Display apparatus
    48.
    发明授权
    Display apparatus 有权
    显示装置

    公开(公告)号:US08953135B2

    公开(公告)日:2015-02-10

    申请号:US12703730

    申请日:2010-02-10

    CPC classification number: G09G3/3611 G09G3/3648 G09G2300/0426 G09G2320/0223

    Abstract: A display apparatus comprises a first thin film transistor (TFT) and a second TFT which are disposed in a display area. A first signal transmission line is disposed in a peripheral area surrounding the display area and is electrically connected to the first TFT. A second signal transmission line adjacent to the first signal transmission line is electrically connected to the second TFT. In a first portion of the peripheral area, the first signal transmission line is parallel to the second signal transmission line and is spaced by a first gap from the second signal transmission line. In a second portion of the peripheral area, the first signal transmission line is parallel to the second signal transmission line and is spaced by a second gap from and the second signal transmission line. The second gap is greater than the first gap. Other features are also provided.

    Abstract translation: 显示装置包括设置在显示区域中的第一薄膜晶体管(TFT)和第二TFT。 第一信号传输线设置在围绕显示区域的周边区域中,并且电连接到第一TFT。 与第一信号传输线相邻的第二信号传输线电连接到第二TFT。 在外围区域的第一部分中,第一信号传输线路与第二信号传输线路平行,并与第二信号传输线路隔开第一间隙。 在外围区域的第二部分中,第一信号传输线平行于第二信号传输线,并与第二信号传输线隔开第二间隙。 第二个差距大于第一个差距。 还提供其他功能。

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