公开(公告)号：US08306172B2

公开(公告)日：2012-11-06

申请号：US12522043

申请日：2007-01-09

Applicant: Paul Kelleher ,  Diarmuid McSwiney ,  Conor O'Keeffe ,  Emilio Quiroga ,  Samir Soni

Inventor： Paul Kelleher ,  Diarmuid McSwiney ,  Conor O'Keeffe ,  Emilio Quiroga ,  Samir Soni

IPC: H04L7/00

CPC classification number: H04L7/0338 ,  H04L7/042

Abstract: A wireless communication device comprises a number of sub-systems and clock generation logic arranged to generate at least one clock signal to be applied to the number of sub-systems. One of the number of sub-systems comprises sampling logic for receiving input data and performing initial sampling on an input data bit using multiple separated phases of a clock period of the at least one clock signal applied to the sampling logic thereby producing multiple phase separated sampled outputs of the input data bit. The sampling logic is configured to perform a number of re-sampling operations on the multiple phase separated sampled outputs at a number of intermediate phases thereby producing multiple phase separated intermediate sampled outputs prior to performing a final sample of the multiple phase separated intermediate sampled outputs at a single phase of the at least one clock signal to produce a sampled input data signal.

Abstract translation: 无线通信设备包括多个子系统和时钟生成逻辑，其布置成生成要应用于子系统数量的至少一个时钟信号。 子系统的数量之一包括用于接收输入数据的采样逻辑，并且使用施加到采样逻辑的至少一个时钟信号的时钟周期的多个分离相位对输入数据位执行初始采样，从而产生多相分离采样 输入数据位的输出。 采样逻辑被配置为在多个中间相位的多相分离采样输出上执行多个重采样操作，从而在执行多相分离中间采样输出的最终采样之前产生多相分离中间采样输出 所述至少一个时钟信号的单相以产生采样的输入数据信号。

公开(公告)号：US08175548B2

公开(公告)日：2012-05-08

申请号：US11910067

申请日：2005-03-30

Applicant: Conor O'Keeffe ,  Denis Dineen ,  Paul Kelleher

Inventor： Conor O'Keeffe ,  Denis Dineen ,  Paul Kelleher

IPC: H04J3/00 ,  H04B1/02

CPC classification number: H04W56/00 ,  H04B7/2681 ,  H04J3/0682 ,  H04W72/12

Abstract: Methods and device for transmitting a sequence of transmission bursts in a wireless device. The method includes transmitting a sequence of transmission bursts according to a transmission schedule. The method is characterized by: receiving, at a radio frequency integrated circuit, prior to a transmission of at least one transmission burst of the sequence, information representative of the timing of the transmission of the at least one transmission burst; and generating timing signals, by the radio frequency integrated circuit that implement the transmission schedule. A wireless device includes a base band integrated circuit adapted to determine a transmission schedule of a sequence of transmission bursts. The wireless device is characterized by including a radio frequency integrated circuit that is adapted receive information representative of the timing schedule and to autonomously control a transmission of the sequence of transmission bursts.

Abstract translation: 用于在无线设备中发送传输突发序列的方法和设备。 该方法包括根据传输调度传输一系列传输脉冲串。 该方法的特征在于：在射频集成电路接收传输该序列的至少一个传输脉冲串之前，表示至少一个传输脉冲串的传输定时的信息; 并通过实现传输调度的射频集成电路产生定时信号。 无线设备包括适于确定传输脉冲序列的传输调度的基带集成电路。 该无线设备的特征在于包括一个射频集成电路，其被适配为代表定时调度的接收信息，并且自主地控制传输脉冲序列的传输。

公开(公告)号：US08094755B2

公开(公告)日：2012-01-10

申请号：US11994766

申请日：2005-07-04

Applicant: Conor O'Keeffe ,  Robert O'Sullivan ,  Patrick Pratt

Inventor： Conor O'Keeffe ,  Robert O'Sullivan ,  Patrick Pratt

IPC: H04L27/22

CPC classification number: H04L27/2017 ,  H03G3/3047 ,  H04L27/0008

Abstract: A modulation system can switch between two modulation modes. In order to comply with limits on peak power in spectral bands outside the RF operating one the transmitter is required to ramp down to a condition of minimal power. To avoid fixed ramping and trailing bits, the transmitting signal is subjected to FIR filtering. The two FIR filters are primed with a sequence using a parallel input mode before serially entering the information data.

Abstract translation: 调制系统可以在两种调制模式之间切换。 为了符合射频外的频谱带峰值功率的限制，发射机需要降低到最小功率的条件。 为了避免固定的斜坡和尾随位，发送信号经过FIR滤波。 在串行输入信息数据之前，使用并行输入模式对两个FIR滤波器进行初始化。

公开(公告)号：US20110043253A1

公开(公告)日：2011-02-24

申请号：US12988831

申请日：2008-05-19

Applicant: Conor O'Keeffe ,  Kiyoshi Kase ,  Paul Kelleher

Inventor： Conor O'Keeffe ,  Kiyoshi Kase ,  Paul Kelleher

IPC: H03D13/00

CPC classification number: H04L7/0337

Abstract: A semiconductor device comprises sampling logic, comprising: input sample path selection logic arranged to enable at least one input sample path; sampler logic arranged to receive and sample an input data signal in a serial data stream in accordance with a phase of the at least one enabled input sample path; and transition detection logic arranged to detect transitions within the received input data signal. The input sample path selection logic is further arranged, upon detection of a transition within the received input data signal, to determine if the phase of the at least one input sample path is a phase having a largest window between logic values; and if it is determined that the phase of the at least one input sample path is not the phase having a largest window between logic values, to enable at least one input sample path comprising a more appropriate phase.

Abstract translation: 半导体器件包括采样逻辑，包括：输入采样路径选择逻辑，布置成使能至少一个输入采样路径; 采样器逻辑，被布置为根据所述至少一个使能的输入采样路径的相位接收和采样串行数据流中的输入数据信号; 以及转移检测逻辑，被布置成检测所接收的输入数据信号内的转变。 在检测到所接收的输入数据信号中的转换之后，进一步布置输入采样路径选择逻辑，以确定至少一个输入采样路径的相位是否是在逻辑值之间具有最大窗口的相位; 并且如果确定所述至少一个输入采样路径的相位不是在逻辑值之间具有最大窗口的相位，以使得能够进行包括更适当相位的至少一个输入采样路径。

公开(公告)号：US20100298035A1

公开(公告)日：2010-11-25

申请号：US12671233

申请日：2007-08-09

Applicant: Norman Beamish ,  Conor O'Keeffe ,  Patrick Pratt ,  David Redmond ,  Jacques Trichet

Inventor： Norman Beamish ,  Conor O'Keeffe ,  Patrick Pratt ,  David Redmond ,  Jacques Trichet

IPC: H04W88/02

CPC classification number: H04B1/0475 ,  H03F1/0211 ,  H03F1/34 ,  H03F3/19 ,  H03F3/24 ,  H03G3/3047 ,  H04B2001/0433 ,  H04W52/52

Abstract: A wireless communication unit comprises a transmitter having a power amplifier and a feedback path operably coupled to the power amplifier. The feedback path comprises a coupler for feeding back a portion of a signal to be transmitted and a detector for detecting a power level of the fed back signal. A controller provides a ramp signal to the power amplifier that controls an amplitude characteristic of the signal to be transmitted. Averaging logic is operably coupled to the detector and arranged to average the detected power level over a first period. Comparison logic is operably coupled to the averaging logic and arranged to compare the average detected power level with a reference value. The controller is operably coupled to the comparison logic and arranged to scale a ramp signal applied to the power amplifier in response to the comparison.

Abstract translation: 无线通信单元包括具有功率放大器和可操作地耦合到功率放大器的反馈路径的发射机。 反馈路径包括用于反馈要发送的信号的一部分的耦合器和用于检测反馈信号的功率电平的检测器。 控制器向功率放大器提供斜坡信号，该功率放大器控制要发送的信号的幅度特性。 平均逻辑可操作地耦合到检测器并且被布置成在第一周期内平均检测到的功率电平。 比较逻辑可操作地耦合到平均逻辑并且被布置成将平均检测到的功率电平与参考值进行比较。 控制器可操作地耦合到比较逻辑，并且被布置为响应于比较来施加到功率放大器的斜坡信号。

公开(公告)号：US07840189B2

公开(公告)日：2010-11-23

申请号：US11721656

申请日：2004-12-15

Applicant: Paul Kelleher ,  Conor O'Keeffe

Inventor： Paul Kelleher ,  Conor O'Keeffe

IPC: H04B1/40

CPC classification number: H03L7/1976

Abstract: A wireless communication device comprises a frequency generation circuit employing a crystal oscillator operably coupled to a fractional-based synthesiser and a voltage-controlled oscillator. The fractional-based synthesiser utilises a ratio between an integer value and a fractional value to set a radio frequency signal of the voltage-controlled oscillator. An automatic frequency control scaling sub-system is operably coupled to a fractional-based synthesiser and configured to receive and use an AFC word to frequency scale the fractional value in a multiplicative manner to set a radio frequency supported by the fractional-based synthesiser. Preferably, an automatic frequency generation sub-system utilises Absolute Radio Frequency Channel Number and the cyclical nature of the fractional value.In this manner, a saving on hardware and software overheads associated with frequency channel selection for fractional-N type synthesizers can be made.

Abstract translation: 无线通信设备包括采用可操作地耦合到基于分数的合成器和压控振荡器的晶体振荡器的频率产生电路。 基于分数的合成器利用整数值和分数值之间的比率来设置压控振荡器的射频信号。 自动频率控制缩放子系统可操作地耦合到基于分数的合成器并且被配置为接收和使用AFC字以乘法方式对分数值进行频率缩放以设置由基于分数的合成器支持的射频。 优选地，自动频率发生子系统利用绝对射频信道号和分数值的周期性质。 以这种方式，可以节省与分数N型合成器的频率信道选择相关的硬件和软件开销。