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41.发明授权Verification of a ground connection fabrication process for ESD resistors in magnetic heads 有权验证磁头中ESD电阻的接地连接制造工艺公开(公告)号：US07768268B2
公开(公告)日：2010-08-03
申请号：US11965479
申请日：2007-12-27
申请人： Satoru Araki , Robert S. Beach , David J. Seagle
发明人： Satoru Araki , Robert S. Beach , David J. Seagle
CPC分类号： G11B5/455 , G11B19/048
摘要： Test methods and components are disclosed for testing the quality of the ground connection fabrication process for ESD shunt resistors in magnetic heads. A wafer is populated with one or more test components along with magnetic heads. The test components are fabricated with ESD shunt resistor ground connections created by the same or similar process used to fabricate the ESD shunt resistor ground connections in magnetic heads on the wafer. The resistance of the test component ground connections may then be measured in order to determine the quality of the ground connections formed by the fabrication process. The quality of the ground connection fabrication process may then be determined based on the measured resistance of the test components.
摘要翻译： 公开了用于测试磁头中ESD分流电阻器的接地连接制造工艺的质量的测试方法和部件。 晶片与磁头一起安装有一个或多个测试部件。 测试组件采用ESD分流电阻器接地连接，由相同或相似的工艺制造，用于制造晶片上磁头中的ESD分流电阻接地连接。 然后可以测量测试部件接地连接的电阻，以便确定由制造工艺形成的接地连接的质量。 然后可以基于所测量的测试组件的电阻来确定接地连接制造过程的质量。
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42.发明申请Test-device system for independent characterization of sensor-width and sensor-stripe-height definition processses 有权用于独立表征传感器宽度和传感器条纹高度定义过程的测试设备系统公开(公告)号：US20090168217A1
公开(公告)日：2009-07-02
申请号：US12006323
申请日：2007-12-31
申请人： Satoru Araki , Robert S. Beach , Ying Hong , David J. Seagle
发明人： Satoru Araki , Robert S. Beach , Ying Hong , David J. Seagle
IPC分类号： G11B27/36
CPC分类号： G11B5/455
摘要： A test-device system and method for deconvoluting measurements of effects of a sensor-width definition process from measurements of effects of a sensor-stripe-height-definition process in a manufacture of a magnetic sensor. The test-device system comprises a first test device for generating data to characterize a sensor-width-definition process. The test-device system also comprises a second test device for generating data to characterize a sensor-stripe-height-definition process. The test-device system allows independent characterization of a sensor-width parameter and a sensor-stripe-height parameter.
摘要翻译： 一种测试装置系统和方法，用于对传感器宽度定义处理的影响进行解卷积测量，所述测量来自传感器条纹高度清晰度过程在制造磁传感器中的影响。 测试设备系统包括用于产生数据以表征传感器宽度定义过程的第一测试设备。 测试设备系统还包括用于生成数据以表征传感器条纹高度清晰度过程的第二测试设备。 测试设备系统允许对传感器宽度参数和传感器条纹高度参数进行独立表征。
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43.发明申请TEST COMPONENTS FABRICATED WITH LARGE AREA SENSORS USED FOR DETERMINING THE RESISTANCE OF AN MR SENSOR 有权用于确定MR传感器电阻的大面积传感器的测试组件公开(公告)号：US20090168215A1
公开(公告)日：2009-07-02
申请号：US11965587
申请日：2007-12-27
IPC分类号： G11B27/36
CPC分类号： G11B20/1816 , G11B5/3166 , G11B5/3173 , G11B5/3193 , G11B5/3903 , G11B2220/2516
摘要： Test methods and components are disclosed for testing resistances of magnetoresistance (MR) sensors in read elements. Test components are fabricated on a wafer with a first test lead, a test MR sensor, and a second test lead. The test leads and test MR sensor are fabricated with similar processes as first shields, MR sensors, and second shields of read elements on tie wafer. However, the test MR sensor is fabricated with an area that is larger than areas of the MR sensors in the read elements. The larger area of the test MR sensor causes the resistance of the test MR sensor to be insignificant compared to the lead resistance. Thus, a resistance measurement of the test component represents the lead resistance of a read element. An accurate resistance measurement of an MR sensor in a read element may then be determined by subtracting the lead resistance.
摘要翻译： 公开了用于测试读取元件中的磁阻（MR）传感器的电阻的测试方法和组件。 在具有第一测试导线，测试MR传感器和第二测试导线的晶片上制造测试部件。 测试引线和测试MR传感器采用与晶片上的读取元件的第一屏蔽，MR传感器和第二屏蔽类似的工艺制造。 然而，测试MR传感器的制造面积大于读取元件中MR传感器的面积。 测试MR传感器的较大面积导致测试MR传感器的电阻与引线电阻相比不显着。 因此，测试部件的电阻测量表示读取元件的引线电阻。 然后可以通过减去引线电阻来确定读取元件中的MR传感器的精确电阻测量。
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44.发明申请VERIFICATION OF A GROUND CONNECTION FABRICATION PROCESS FOR ESD RESISTORS IN MAGNETIC HEADS 有权磁头中ESD电阻的接地连接制造工艺的验证公开(公告)号：US20090168213A1
公开(公告)日：2009-07-02
申请号：US11965479
申请日：2007-12-27
申请人： Satoru Araki , Robert S. Beach , David J. Seagle
发明人： Satoru Araki , Robert S. Beach , David J. Seagle
IPC分类号： G11B27/36
CPC分类号： G11B5/455 , G11B19/048
摘要： Test methods and components are disclosed for testing the quality of the ground connection fabrication process for ESD shunt resistors in magnetic heads. A wafer is populated with one or more test components along with magnetic heads. The test components are fabricated with ESD shunt resistor ground connections created by the same or similar process used to fabricate the ESD shunt resistor ground connections in magnetic heads on the wafer. The resistance of the test component ground connections may then be measured in order to determine the quality of the ground connections formed by the fabrication process. The quality of the ground connection fabrication process may then be determined based on the measured resistance of the test components.
摘要翻译： 公开了用于测试磁头中ESD分流电阻器的接地连接制造工艺的质量的测试方法和部件。 晶片与磁头一起安装有一个或多个测试部件。 测试组件采用ESD分流电阻器接地连接，由相同或相似的工艺制造，用于制造晶片上磁头中的ESD分流电阻接地连接。 然后可以测量测试部件接地连接的电阻，以便确定由制造工艺形成的接地连接的质量。 然后可以基于所测量的测试组件的电阻来确定接地连接制造过程的质量。
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45.发明申请公开(公告)号：US20090151151A1
公开(公告)日：2009-06-18
申请号：US11957468
申请日：2007-12-16
CPC分类号： G11B5/3163 , G11B5/3106 , G11B5/3932 , G11B5/40 , Y10T29/49021 , Y10T29/49032 , Y10T29/49034 , Y10T29/49043 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052
摘要： Methods of fabricating magnetic read heads are provided which reduce the width of the scratch exposure region of a read head. During normal fabrication processes, a read head is formed with a first shield, a read element formed on the first shield, and hard bias layers formed on either side of the read element. The width of the read elements and the hard bias layers define an initial scratch exposure region. According to embodiments herein, a mask structure is formed to protect the read element and first portions of the hard bias layers proximate to the read element. A removal process is then performed to remove second portions of the hard bias layers that are not protected by the mask structure, which defines a final scratch exposure region that is smaller than the initial scratch exposure region.
摘要翻译： 提供制造磁读头的方法，其减小读头的划痕曝光区域的宽度。 在通常的制造过程中，读头形成有第一屏蔽，形成在第一屏蔽上的读取元件以及形成在读取元件两侧的硬偏置层。 读取元件和硬偏置层的宽度限定初始划痕曝光区域。 根据本文的实施例，形成掩模结构以保护读取元件和靠近读取元件的硬偏置层的第一部分。 然后执行去除处理以去除未被掩模结构保护的硬偏置层的第二部分，其限定小于初始划痕暴露区域的最终刮擦暴露区域。
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公开(公告)号：US07307814B1
公开(公告)日：2007-12-11
申请号：US10087505
申请日：2002-03-01
IPC分类号： G11B5/147
CPC分类号： G11B5/3116 , G11B5/3146
摘要： A method and system for providing a pedestal defined zero throat write head is disclosed. The method and system include providing a first pole having a pedestal, providing a gap and providing a second pole. The first pole has a pedestal. The gap separates the pedestal of the first pole from a portion of the second pole. The pedestal has a front, a back, a top and a bottom. The back of the pedestal has a recess therein, which runs from the top of the pedestal to the bottom of the pedestal.
摘要翻译： 公开了一种用于提供基座定义的零喉部写入头的方法和系统。 该方法和系统包括提供具有基座的第一极，提供间隙并提供第二极。 第一杆有一个基座。 该间隙将第一极的基座与第二极的一部分分开。 底座具有前部，后部，顶部和底部。 基座的背面在其中具有凹槽，该凹槽从基座的顶部延伸到基座的底部。
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公开(公告)号：US06909578B1
公开(公告)日：2005-06-21
申请号：US10159529
申请日：2002-05-30
CPC分类号： G11B5/3903 , G11B5/3106 , G11B5/3133 , G11B5/3136 , G11B5/3146
摘要： A method and system for providing head is disclosed. The method and system include providing a first pole, a second pole, a write gap, at least one coil and an Fe3Pt alloy. The write gap separates the first pole from the second pole. The first and second poles are for writing to a medium. The coil(s) have a plurality of turns and reside between the roles. The Fe3Pt alloy is in proximity to the first pole and the second pole. The Fe3Pt alloy is configured to counteract expansion of the first pole and the second pole.
摘要翻译： 公开了一种用于提供头的方法和系统。 该方法和系统包括提供第一极，第二极，写间隙，至少一个线圈和Fe 3 Pt合金。 写入间隙将第一极与第二极分开。 第一和第二极用于写入介质。 线圈具有多个匝并且驻留在角色之间。 Fe 3 Pt合金位于第一极和第二极附近。 Fe 3 Pt合金构造成抵消第一极和第二极的膨胀。
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公开(公告)号：US06256157B1
公开(公告)日：2001-07-03
申请号：US09079903
申请日：1998-05-15
IPC分类号： G11B2736
CPC分类号： G11B20/10009 , G11B5/02 , G11B20/24 , G11B2005/0016
摘要： A method and apparatus is disclosed for reducing electrical noise from noise spikes in an electrical information signal. The invention can provide protection of a data storage system from soft errors rate due to noise spikes appearing in the signal from the input transducer. A cancellation signal for the low frequency component (i.e. in the system bandwidth) of the noise signal is generated. The cancellation signal is derived from a frequency band that appears in the noise spike, but does not appear in the system bandwidth for the information signal. The cancellation signal is generated in the preferred embodiment by a cancellation signal generator comprising a high pass filter and a mixer. The mixer generates a cancellation signal by processing the high frequency portion using a waveform above the normal high frequency cutoff to reconstitute the low frequency component of the noise spike in the normal frequency band. Then, the cancellation signal and the delayed input signal are combined to reduce or remove the low frequency component of the noise spike. The remaining frequency components of the noise spike can easily be removed since they are outside of system bandwidth. The invention is particularly useful in a storage system having MR heads.
摘要翻译： 公开了一种用于降低电信号信号中噪声尖峰的电噪声的方法和装置。 本发明可以提供数据存储系统的保护，防止由于来自输入变换器的信号中出现的噪声尖峰引起的软错误率。 产生噪声信号的低频分量（即系统带宽）的消除信号。 消除信号从出现在噪声尖峰中的频带导出，但不出现在信息信号的系统带宽中。 在优选实施例中，消除信号由包括高通滤波器和混频器的消除信号发生器产生。 混频器通过使用高于正常高频截止频率的波形处理高频部分来重构正常频带中的噪声尖峰的低频分量来产生消除信号。 然后，消除信号和延迟的输入信号被组合以减少或去除噪声尖峰的低频分量。 噪声尖峰的剩余频率分量可以容易地被去除，因为它们在系统带宽之外。 本发明在具有MR磁头的存储系统中特别有用。
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公开(公告)号：US5588199A
公开(公告)日：1996-12-31
申请号：US339523
申请日：1994-11-14
CPC分类号： G11B5/3903 , G11B5/3166 , Y10T29/49037 , Y10T29/49046 , Y10T29/49048
摘要： A method of lapping magnetoresistive (MR) heads individually which provides an MR element having a desired height with minimized skew is described. During fabrication of the MR head, one or more shunt resistors are formed between the edge of the MR element and the head air bearing surface. The shunt resistors are electrically connected at each end to extensions of the MR electrical leads and connected to the MR element and to each other at points between the ends forming a resistor network. During lapping of the MR head, the resistance of the resistor network is measured by an Ohmmeter connected between the MR element leads. As portions of the shunt resistors are ground away, the changes in the measured resistance of the resistor network are used to monitor and control any skew in the lapping process.
摘要翻译： 描述了单独研磨磁阻（MR）头的方法，其提供具有最小偏移的期望高度的MR元件。 在制造MR磁头时，在MR元件的边缘和头部空气轴承表面之间形成一个或多个分流电阻。 分流电阻器的每一端电连接到MR电引线的延伸部分并连接到MR元件，并且在形成电阻器网络的端部之间的点彼此连接。 在研磨MR头期间，电阻网络的电阻由连接在MR元件引线之间的欧姆表测量。 由于分流电阻器的部分被接地，电阻网络的测量电阻的变化用于监测和控制研磨过程中的任何偏斜。
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