公开(公告)号：US10276665B2

公开(公告)日：2019-04-30

申请号：US15632842

申请日：2017-06-26

Applicant: Hyundai Motor Company ,  Kia Motors Corporation

Inventor： Dae Hwan Chun

IPC: H01L29/16 ,  H01L29/78 ,  H01L29/66 ,  H01L29/423

Abstract: A semiconductor device is provided. The semiconductor device includes a n− type layer disposed at a first surface of a n+ type silicon carbide substrate and a trench disposed at the n− type layer. Additionally, a first gate electrode and a second gate electrode are disposed in the trench and separated from each other. A source electrode is insulated from the first gate electrode and the second gate electrode. Further, the semiconductor includes a drain electrode that is disposed at a second surface of the n+ type silicon carbide substrate, a first channel disposed adjacent to a side surface of the trench and a second channel disposed under the lower surface of the trench. The first channel and the second channel are separated from each other.

公开(公告)号：US20190123171A1

公开(公告)日：2019-04-25

申请号：US15823856

申请日：2017-11-28

Applicant: Hyundai Motor Company ,  Kia Motors Corporation

Inventor： Youngkyun Jung ,  NackYong Joo ,  Junghee Park ,  Hyun Woo Noh ,  JongSeok Lee ,  Dae Hwan Chun

IPC: H01L29/66 ,  H01L29/423 ,  H01L21/3065 ,  H01L21/308

Abstract: A manufacturing method of a semiconductor device is provided. The method includes sequentially forming an n− type of layer, a p type of region, and an n+ type of region on a first surface of a substrate, forming a preliminary trench in the n− type of layer by a first etching process and forming a preliminary gate insulating layer by a first thermal oxidation process. The method includes etching the lower surface of the preliminary trench and the preliminary second portion to form a trench by a second etching process and forming a gate insulating layer in the trench by a second thermal oxidation process. The gate insulating layer includes a first and second portion. The preliminary first portion is thicker than the preliminary second portion and the first portion. The first portion thickness is equal to the thickness of the second portion.

公开(公告)号：US10164020B2

公开(公告)日：2018-12-25

申请号：US15632077

申请日：2017-06-23

Applicant: Hyundai Motor Company ,  Kia Motors Corporation

Inventor： Dae Hwan Chun ,  NackYong Joo

IPC: H01L29/78 ,  H01L51/10 ,  H01L29/16 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device may include an n− type layer disposed at a first surface of an n+ type silicon carbide substrate; a p− type region, a p type region, an n+ type region, and a p+ type region disposed at an upper portion in the n− type layer; a gate electrode and a source electrode disposed on the n− type layer and insulated from each other; and a drain electrode disposed at a second surface of the n+ type silicon carbide substrate, wherein the source electrode is in contact with the p− type region, the n+ type region, and the p+ type region, and the source electrode may include an ohmic junction region disposed at a contact portion of the source electrode and the n+ type region and the contact portion of the source region and the p+ type region and a Schottky junction region disposed at the contact portion of the source electrode and the p− type region.

公开(公告)号：US09887286B2

公开(公告)日：2018-02-06

申请号：US14853459

申请日：2015-09-14

Applicant: HYUNDAI MOTOR COMPANY

Inventor： Dae Hwan Chun ,  Jong Seok Lee ,  Junghee Park ,  Kyoung-Kook Hong ,  Youngkyun Jung

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/16

CPC classification number: H01L29/7813 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66719

Abstract: The present inventive concept relates to a semiconductor device, and more particularly to a semiconductor device that can increase the amount of current by reducing impedance, and a method of manufacturing the semiconductor device.A semiconductor device comprises an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate; an n+ region disposed on the n− type epitaxial layer; first and second trenches disposed in the n− type epitaxial layer and the n+ region; first and second gate insulating layers disposed inside the first and second trenches, respectively; first and second gate electrodes disposed on the first and second gate insulating layers, respectively; a p-type region disposed on two sides of one of the first and second trenches; an oxidation film disposed on the first and second gate electrodes; a source electrode disposed on the n+ region and the oxidation film; and a drain electrode disposed on a second surface of the n+ type silicon carbide substrate, wherein a first channel is disposed on two sides of the first trench and a second channel is disposed on two sides of the second trench.

公开(公告)号：US20170162665A1

公开(公告)日：2017-06-08

申请号：US15440657

申请日：2017-02-23

Applicant: Hyundai Motor Company

Inventor： Youngkyun Jung ,  Junghee Park ,  Dae Hwan Chun ,  JongSeok Lee

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/306 ,  H01L23/535 ,  H01L21/768 ,  H01L21/265 ,  H01L29/16 ,  H01L29/872

CPC classification number: H01L29/66143 ,  H01L21/02529 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/76895 ,  H01L23/535 ,  H01L29/0623 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872

Abstract: A Schottky barrier diode includes: an n+ type of silicon carbide substrate; an n− type of epitaxial layer formed on a first surface of the n+ type of silicon carbide substrate; a plurality of p+ regions formed inside the n− type of epitaxial layer; a Schottky electrode formed in an upper portion of the n− type of epitaxial layer of an electrode region; and an ohmic electrode formed on a second surface of the n+ type of silicon carbide substrate, wherein the plurality of p+ regions are formed to be spaced apart from each other at a predetermined interval within the n− type of epitaxial layer.

公开(公告)号：US20170033240A1

公开(公告)日：2017-02-02

申请号：US14952186

申请日：2015-11-25

Applicant: Hyundai Motor Company

Inventor： Youngkyun Jung ,  Junghee Park ,  Dae Hwan Chun ,  JongSeok Lee

IPC: H01L29/872 ,  H01L21/266 ,  H01L29/45 ,  H01L21/265 ,  H01L29/16 ,  H01L29/66

CPC classification number: H01L29/66143 ,  H01L21/02529 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/76895 ,  H01L23/535 ,  H01L29/0623 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872

Abstract: A Schottky barrier diode includes: an n+ type of silicon carbide substrate; an n-type of epitaxial layer formed on a first surface of the n+ type of silicon carbide substrate; a plurality of p+ regions formed inside the n-type of epitaxial layer; a Schottky electrode formed in an upper portion of the n-type of epitaxial layer of an electrode region; and an ohmic electrode formed on a second surface of the n+ type of silicon carbide substrate, wherein the plurality of p+ regions are formed to be spaced apart from each other at a predetermined interval within the n-type of epitaxial layer.

Abstract translation: 肖特基势垒二极管包括：n +型碳化硅衬底; 在n +型碳化硅衬底的第一表面上形成的n型外延层; 形成在n型外延层内的多个p +区; 形成在电极区域的n型外延层的上部的肖特基电极; 以及形成在所述n +型碳化硅衬底的第二表面上的欧姆电极，其中所述多个p +区形成为在所述n型外延层内以预定间隔彼此间隔开。

公开(公告)号：US20150187929A1

公开(公告)日：2015-07-02

申请号：US14317426

申请日：2014-06-27

Applicant: HYUNDAI MOTOR COMPANY

Inventor： Dae Hwan Chun ,  Kyoung-Kook Hong ,  Jong Seok Lee ,  Junghee Park ,  Youngkyun Jung

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/16 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/7811 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/086 ,  H01L29/1608 ,  H01L29/4238 ,  H01L29/66068 ,  H01L29/7813

Abstract: A semiconductor device includes: a first n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate including a current carrying region and termination regions positioned at both sides of the current carrying region; a p type epitaxial layer disposed on the first n− type epitaxial layer; a second n− type epitaxial layer disposed on the p type epitaxial layer; a first trench disposed in the current carrying region; a second trench disposed in each termination region; a gate insulating layer disposed in the first trench; a gate electrode disposed on the gate insulating layer; and a termination insulating layer disposed in the second trench, in which a side of the termination insulating layer contacts the p type epitaxial layer and the second n− type epitaxial layer.

Abstract translation: 半导体器件包括：第一n型外延层，其设置在n +型碳化硅衬底的第一表面上，该n +型碳化硅衬底包括载流区域和位于载流区域两侧的端接区域; 设置在第一n型外延层上的p型外延层; 设置在p型外延层上的第二n型外延层; 布置在所述载流区域中的第一沟槽; 设置在每个端接区域中的第二沟槽; 设置在所述第一沟槽中的栅极绝缘层; 设置在所述栅极绝缘层上的栅电极; 以及设置在第二沟槽中的终端绝缘层，其中端接绝缘层的一侧接触p型外延层和第二n-型外延层。

公开(公告)号：US20150179794A1

公开(公告)日：2015-06-25

申请号：US14314813

申请日：2014-06-25

Applicant: Hyundai Motor Company

Inventor： Kyoung-Kook HONG ,  Dae Hwan Chun ,  Jong Seok Lee ,  Youngkyun Jung ,  Su Bin Kang

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66 ,  H01L29/16 ,  H01L29/22

CPC classification number: H01L29/7827 ,  H01L21/02565 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/22 ,  H01L29/66068 ,  H01L29/66666 ,  H01L29/7813

Abstract: Disclosed are a semiconductor device and a method of manufacturing a semiconductor device. The device may include an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate, a p type epitaxial layer disposed on the n− type epitaxial layer, an n+ region disposed on the p type epitaxial layer, a trench passing through the p type epitaxial layer and the n+ region and disposed on the n− type epitaxial layer, a p+ region disposed on the n− type epitaxial layer and separated from the trench, a gate insulating layer positioned in the trench, a gate electrode positioned on the gate insulating layer, an oxide layer positioned on the gate electrode, a source electrode positioned on the n+ region, the oxide layer, and the p+ region, and a drain electrode positioned on a second surface of the n+ type silicon carbide substrate, in which channels are positioned on both sides of the trench.

Abstract translation: 公开了一种半导体器件和半导体器件的制造方法。 器件可以包括设置在n +型碳化硅衬底的第一表面上的n型外延层，设置在n型外延层上的ap型外延层，设置在p型外延层上的n +区，沟槽通过 通过p型外延层和n +区并且设置在n型外延层上，设置在n型外延层上并与沟槽分离的p +区，位于沟槽中的栅极绝缘层，位于 在栅极绝缘层上，位于栅电极上的氧化物层，位于n +区上的源极，氧化物层和p +区，以及位于n +型碳化硅衬底的第二表面上的漏电极， 其中通道位于沟槽的两侧。

公开(公告)号：US20150079747A1

公开(公告)日：2015-03-19

申请号：US14143554

申请日：2013-12-30

Applicant: Hyundai Motor Company

Inventor： Youngkyun Jung ,  Dae Hwan Chun ,  Kyoung-Kook Hong ,  Jong Seok Lee ,  Junghee Park

IPC: H01L29/66 ,  H01L21/02

CPC classification number: H01L29/66666 ,  H01L21/02104 ,  H01L21/0475 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/66068 ,  H01L29/7813

Abstract: Provided is a method of manufacturing a semiconductor device including sequentially forming an n-type epitaxial layer, a p type epitaxial layer, and an n+ region on a first surface of an n+ type silicon carbide substrate; forming a buffer layer on the n+ region; forming a photosensitive film pattern on a part of the buffer layer; etching the buffer layer using the photosensitive film pattern as a mask to form a buffer layer pattern; sequentially forming a first metal layer and a second metal layer which include a first portion and a second portion; removing one or more components to expose a part of the n+ region; and etching the exposed part of the n+ region using the first portion of the first metal layer and the first portion of the second metal layer as masks to form a trench.

Abstract translation: 提供一种制造半导体器件的方法，包括在n +型碳化硅衬底的第一表面上顺序形成n型外延层，p型外延层和n +区; 在n +区上形成缓冲层; 在缓冲层的一部分上形成感光膜图案; 使用感光膜图案作为掩模蚀刻缓冲层以形成缓冲层图案; 顺序地形成包括第一部分和第二部分的第一金属层和第二金属层; 去除一个或多个组件以暴露n +区域的一部分; 以及使用第一金属层的第一部分和第二金属层的第一部分作为掩模蚀刻n +区域的暴露部分以形成沟槽。

公开(公告)号：US20150069412A1

公开(公告)日：2015-03-12

申请号：US14143735

申请日：2013-12-30

Applicant: Hyundai Motor Company

Inventor： Jong Seok Lee ,  Kyoung-Kook Hong ,  Dae Hwan Chun ,  Youngkyun Jung

IPC: H01L29/872 ,  H01L29/66

CPC classification number: H01L29/872 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66143

Abstract: A Schottky barrier diode and a method of manufacturing the Schottky barrier diode are provided. The diode includes an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate and having an upper surface, a lower surface, and an inclined surface that connects the upper surface and the lower surface. A p region is disposed on the inclined surface of the n− type epitaxial layer and a Schottky electrode is disposed on the upper surface of the n− type epitaxial layer and the p region. In addition, an ohmic electrode is disposed on a second surface of the n+ type silicon carbide substrate.

Abstract translation: 提供肖特基势垒二极管和制造肖特基势垒二极管的方法。 二极管包括n型外延层，其设置在n +型碳化硅衬底的第一表面上，并具有上表面，下表面和连接上表面和下表面的倾斜表面。 p区设置在n型外延层的倾斜表面上，肖特基电极设置在n型外延层和p区的上表面上。 此外，欧姆电极设置在n +型碳化硅衬底的第二表面上。