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    LIGHT-SENSING APPARATUS, METHOD OF DRIVING THE LIGHT-SENSING APPARATUS, AND OPTICAL TOUCH SCREEN APPARATUS INCLUDING THE LIGHT-SENSING APPARATUS
    41.
    发明申请
    LIGHT-SENSING APPARATUS, METHOD OF DRIVING THE LIGHT-SENSING APPARATUS, AND OPTICAL TOUCH SCREEN APPARATUS INCLUDING THE LIGHT-SENSING APPARATUS 有权
    感光装置，驱动感光装置的方法，以及包括感光装置的光触控屏幕装置

    公开(公告)号：US20130063400A1

    公开(公告)日：2013-03-14

    申请号：US13553245

    申请日：2012-07-19

    申请人： Seung-eon Ahn ,  I-Hun Song ,  Sang-hun Jeon ,  Young Kim ,  Yong-woo Jeon ,  Chang-jung Kim

    发明人： Seung-eon Ahn ,  I-Hun Song ,  Sang-hun Jeon ,  Young Kim ,  Yong-woo Jeon ,  Chang-jung Kim

    IPC分类号： G06F3/042 ,  H01L27/144 ,  H01L31/112

    CPC分类号： H01L27/14609 ,  G06F3/0412 ,  G06F3/0421 ,  G06F2203/04103

    摘要： In one embodiment, a light-sensing apparatus includes a light-sensing pixel array that has a plurality of light-sensing pixels arranged in rows and columns; and a gate driver configured to provide the light-sensing pixels with a gate voltage and a reset signal that have inverted phases. Each of the light-sensing pixels includes a light sensor transistor configured to sense light and a switch transistor configured to output a light-sensing signal from the light-sensor transistor. The gate driver includes a plurality of gate lines connected to gates of the switch transistors, a plurality of reset lines connected to gates of the light sensor transistors, and a plurality of phase inverters each connected between a corresponding reset line and a gate line. Thus, when a gate voltage is applied to one of the plurality of gate lines, a reset signal with an inversed phase to the gate voltage may be applied to a corresponding reset line.

    摘要翻译： 在一个实施例中，光感测装置包括具有排列成行和列的多个感光像素的感光像素阵列; 以及栅极驱动器，被配置为向所述感光像素提供具有反相的栅极电压和复位信号。 每个感光像素包括被配置为感测光的光传感器晶体管和被配置为输出来自光传感器晶体管的光感测信号的开关晶体管。 栅极驱动器包括连接到开关晶体管的栅极的多个栅极线，连接到光传感器晶体管的栅极的多个复位线，以及各自连接在相应的复位线和栅极线之间的多个相位逆变器。 因此，当栅极电压施加到多条栅极线中的一条栅极线时，具有与栅极电压相反的相位的复位信号可被施加到相应的复位线。

    Method of manufacturing a memory device having improved erasing characteristics
    42.
    发明授权
    Method of manufacturing a memory device having improved erasing characteristics 有权
    具有改善擦除特性的存储器件的制造方法

    公开(公告)号：US07402492B2

    公开(公告)日：2008-07-22

    申请号：US11385642

    申请日：2006-03-21

    申请人： Sang-hun Jeon ,  Kyu-sik Kim ,  Chung-woo Kim ,  Sung-ho Park ,  Yo-sep Min ,  Jeong-hee Han

    发明人： Sang-hun Jeon ,  Kyu-sik Kim ,  Chung-woo Kim ,  Sung-ho Park ,  Yo-sep Min ,  Jeong-hee Han

    IPC分类号： H01L21/336

    CPC分类号： H01L21/324 ,  H01L21/28273 ,  H01L21/28282

    摘要： In a method of manufacturing a memory device having improved erasing characteristics, the method includes sequentially forming a tunneling oxide layer, a charge storing layer, and a blocking oxide layer on a semiconductor substrate; annealing the semiconductor substrate including the tunneling oxide layer, the charge storing layer, and the blocking oxide layer under a gas atmosphere so that the blocking oxide layer has a negative fixed oxide charge; forming a gate electrode on the blocking oxide layer with the negative fixed oxide charge and etching the tunneling oxide layer, the charge storing layer, and the blocking oxide layer to form a gate structure; and forming a first doped region and a second doped region in the semiconductor substrate at sides of the gate structure by doping the semiconductor substrate with a dopant.

    摘要翻译： 在制造具有改善的擦除特性的存储器件的方法中，该方法包括在半导体衬底上依次形成隧穿氧化物层，电荷存储层和阻挡氧化物层; 在气体气氛下退火包括隧道氧化物层，电荷存储层和阻挡氧化物层的半导体衬底，使得阻挡氧化物层具有负的固定氧化物电荷; 在阻挡氧化物层上形成具有负固定氧化物电荷的栅电极，蚀刻隧道氧化物层，电荷存储层和阻挡氧化物层以形成栅极结构; 以及通过用掺杂剂掺杂半导体衬底，在栅极结构的侧面在半导体衬底中形成第一掺杂区和第二掺杂区。

    Method of manufacturing a memory device having improved erasing characteristics
    43.
    发明申请
    Method of manufacturing a memory device having improved erasing characteristics 有权
    具有改善擦除特性的存储器件的制造方法

    公开(公告)号：US20060211205A1

    公开(公告)日：2006-09-21

    申请号：US11385642

    申请日：2006-03-21

    申请人： Sang-hun Jeon ,  Kyu-sik Kim ,  Chung-woo Kim ,  Sung-ho Park ,  Yo-sep Min ,  Jeong-hee Han

    发明人： Sang-hun Jeon ,  Kyu-sik Kim ,  Chung-woo Kim ,  Sung-ho Park ,  Yo-sep Min ,  Jeong-hee Han

    IPC分类号： H01L21/336

    CPC分类号： H01L21/324 ,  H01L21/28273 ,  H01L21/28282

    摘要： In a method of manufacturing a memory device having improved erasing characteristics, the method includes sequentially forming a tunneling oxide layer, a charge storing layer, and a blocking oxide layer on a semiconductor substrate; annealing the semiconductor substrate including the tunneling oxide layer, the charge storing layer, and the blocking oxide layer under a gas atmosphere so that the blocking oxide layer has a negative fixed oxide charge; forming a gate electrode on the blocking oxide layer with the negative fixed oxide charge and etching the tunneling oxide layer, the charge storing layer, and the blocking oxide layer to form a gate structure; and forming a first doped region and a second doped region in the semiconductor substrate at sides of the gate structure by doping the semiconductor substrate with a dopant.

    摘要翻译： 在制造具有改善的擦除特性的存储器件的方法中，该方法包括在半导体衬底上依次形成隧穿氧化物层，电荷存储层和阻挡氧化物层; 在气体气氛下退火包括隧道氧化物层，电荷存储层和阻挡氧化物层的半导体衬底，使得阻挡氧化物层具有负的固定氧化物电荷; 在阻挡氧化物层上形成具有负固定氧化物电荷的栅电极，蚀刻隧道氧化物层，电荷存储层和阻挡氧化物层以形成栅极结构; 以及通过用掺杂剂掺杂半导体衬底，在栅极结构的侧面在半导体衬底中形成第一掺杂区和第二掺杂区。

    Auxiliary power supply and user device including the auxiliary power supply
    44.
    发明授权
    Auxiliary power supply and user device including the auxiliary power supply 有权
    辅助电源和用户设备包括辅助电源

    公开(公告)号：US09024592B2

    公开(公告)日：2015-05-05

    申请号：US13431474

    申请日：2012-03-27

    申请人： Sang-hun Jeon ,  Ho-jun Shim

    发明人： Sang-hun Jeon ,  Ho-jun Shim

    IPC分类号： H02J7/00 ,  G06F1/26 ,  G06F1/30 ,  H02J7/34

    CPC分类号： G06F1/263 ,  G06F1/30 ,  H02J7/345

    摘要： Auxiliary power supplies include a capacitor (e.g., super capacitor) and a capacitor charging circuit, which is configured to provide a charging current to a first terminal of the capacitor. Enhanced failure detection is provided by a capacitor monitoring circuit, which may be electrically coupled to at least one terminal of the capacitor. The capacitor monitoring circuit is configured to detect when the capacitor is malfunctioning in an open condition as well as when the capacitor is malfunctioning in a short condition.

    摘要翻译： 辅助电源包括电容器（例如超级电容器）和电容器充电电路，其被配置为向电容器的第一端子提供充电电流。 增强的故障检测由电容器监控电路提供，其可以电耦合到电容器的至少一个端子。 电容器监视电路被配置为检测电容器何时在打开状态下发生故障，以及当电容器在短时间内发生故障时。

    SONOS memory device using an amorphous memory node material
    45.
    发明授权
    SONOS memory device using an amorphous memory node material 有权
    SONOS存储器件使用非晶体存储器节点材料

    公开(公告)号：US08217445B2

    公开(公告)日：2012-07-10

    申请号：US10864499

    申请日：2004-06-10

    申请人： Sang-hun Jeon ,  Soo-doo Chae ,  Ju-hyung Kim ,  Chung-woo Kim

    发明人： Sang-hun Jeon ,  Soo-doo Chae ,  Ju-hyung Kim ,  Chung-woo Kim

    IPC分类号： H01L29/792

    CPC分类号： H01L21/28282

    摘要： A SONOS memory device, and a method of manufacturing the same, includes a substrate and a multifunctional device formed on the substrate. The multifunctional device performs both switching and data storing functions. The multifunctional device includes first and second impurities areas, a channel formed between the first and second impurities areas, and a stacked material formed on the channel for data storage. The stacked material for data storage is formed by sequentially stacking a tunneling oxide layer, a memory node layer in which data is stored, a blocking layer, and an electrode layer.

    摘要翻译： SONOS存储器件及其制造方法包括形成在衬底上的衬底和多功能器件。 多功能设备执行切换和数据存储功能。 多功能装置包括第一和第二杂质区域，形成在第一和第二杂质区域之间的通道，以及形成在通道上用于数据存储的堆叠材料。 用于数据存储的层叠材料通过依次层叠隧道氧化物层，存储数据的存储节点层，阻挡层和电极层而形成。

    Non-volatile semiconductor memory device with alternative metal gate material
    47.
    发明授权
    Non-volatile semiconductor memory device with alternative metal gate material 有权
    具有替代金属栅极材料的非易失性半导体存储器件

    公开(公告)号：US07391075B2

    公开(公告)日：2008-06-24

    申请号：US11246114

    申请日：2005-10-11

    申请人： Sang-hun Jeon ,  Jeong-hee Han ,  Chung-woo Kim

    发明人： Sang-hun Jeon ,  Jeong-hee Han ,  Chung-woo Kim

    IPC分类号： H01L29/788

    CPC分类号： H01L29/513 ,  G11C16/0416 ,  G11C16/0466 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/7881 ,  H01L29/792

    摘要： A non-volatile semiconductor memory device comprises a substrate including a source region, a drain region and a channel region provided between the source region and the drain region with a gate stack located above the channel region with a metal gate located above the gate stack. The metal gate is comprised of a metal having a specific metal work function relative to a composition of a layer of the gate stack that causes electrons to travel through the entire thickness of the blocking layer via direct tunneling. The gate stack preferably comprises a multiple layer stack selected from a group of multiple layer stacks consisting of: ONO, ONH, OHH, OHO, HHH, or HNH, where O is an oxide material, N is SiN, and H is a high κ material.

    摘要翻译： 非易失性半导体存储器件包括：衬底，其包括源区域，漏极区域和设置在源极区域和漏极区域之间的沟道区域，栅极堆叠位于沟道区域上方，金属栅极位于栅极叠层之上。 金属栅极由具有特定的金属功函数的金属组成，相对于栅堆叠层的组成，其使电子通过直接隧道穿过阻挡层的整个厚度。 栅极堆叠优选地包括选自由以下组成的多层堆叠的多层堆叠：ONO，ONH，OHH，OHO，HHH或HNH，其中O是氧化物材料，N是SiN，H是高kappa 材料。

    Slim-type speaker with interconnecting damper and bobbin
    49.
    发明授权
    Slim-type speaker with interconnecting damper and bobbin 有权
    带有互连阻尼器和线轴的超薄型扬声器

    公开(公告)号：US08582800B2

    公开(公告)日：2013-11-12

    申请号：US13343342

    申请日：2012-01-04

    申请人： Min Kim ,  Hag-do Kim ,  Sang-hun Jeon

    发明人： Min Kim ,  Hag-do Kim ,  Sang-hun Jeon

    IPC分类号： H04R9/06 ,  H04R11/02

    CPC分类号： H04R9/043 ,  Y10T29/49005

    摘要： A speaker includes a frame, a diaphragm disposed in a top end of the frame of the speaker and a bobbin disposed below the diaphragm. A voice coil is wound around a bottom end of the bobbin and a magnetic member, which has a groove in which the bottom end of the bobbin around which the voice coil is wound, is inserted and reciprocated in a straight line upward and downward. A central pillar is fixed to the magnetic member at a center of the bobbin and extends parallel to the movement of the bobbin. A damper supports an inner circumferential surface of the bobbin from the central pillar. The damper additionally supports an outer circumferential surface of the bobbin, from the frame, so as to allow the bobbin to reciprocate in a straight line. This results in minimization of wobble and distortion, so that accurate sound is generated.

    摘要翻译： 扬声器包括框架，设置在扬声器的框架的顶端的隔膜和设置在隔膜下方的筒管。 音圈缠绕在线轴的底端，磁性构件具有一个槽，在该槽中绕着绕线圈的绕线筒的底端以一直线向上和向下插入和往复运动。 中心支柱固定在线轴的中心处的磁性构件上，并平行于线轴的运动而延伸。 阻尼器从中心支柱支撑线轴的内圆周表面。 阻尼器另外从框架支撑筒管的外圆周表面，以便使筒管以直线往复运动。 这导致摆动和失真的最小化，从而产生准确的声音。

    Memory devices including barrier layers and methods of manufacturing the same
    50.
    发明授权
    Memory devices including barrier layers and methods of manufacturing the same 有权
    存储器件包括阻挡层及其制造方法

    公开(公告)号：US07358137B2

    公开(公告)日：2008-04-15

    申请号：US11245426

    申请日：2005-10-07

    申请人： Sang-hun Jeon ,  Chung-woo Kim ,  Hyun-sang Hwang

    发明人： Sang-hun Jeon ,  Chung-woo Kim ,  Hyun-sang Hwang

    IPC分类号： H01L21/336 ,  H01L29/788

    CPC分类号： H01L21/28273 ,  H01L29/513 ,  H01L29/7881

    摘要： Memory devices and methods of manufacturing the same are provided. Memory devices may include a substrate, a source region and a drain region and a gate structure. The gate structure may be in contact with the source and drain regions, and may include a barrier layer. The barrier layer may be formed of at least two layers. The at least two layers may have different bandgap energies.

    摘要翻译： 提供了存储器件及其制造方法。 存储器件可以包括衬底，源极区域和漏极区域以及栅极结构。 栅极结构可以与源极和漏极区域接触，并且可以包括阻挡层。 阻挡层可以由至少两层形成。 至少两层可能具有不同的带隙能量。