公开(公告)号：US10651859B2

公开(公告)日：2020-05-12

申请号：US16276696

申请日：2019-02-15

Applicant: Infineon Technologies AG

Inventor： Farhan Bin Khalid ,  Herbert Jaeger ,  Dian Tresna Nugraha ,  Andre Roger

IPC: H03L7/091 ,  G01S7/28 ,  G01S13/931 ,  H04L7/033

Abstract: A radar device comprises a data communication input interface configured to receive a data clock signal for a data bus and an analog to digital converter configured to sample a signal at time instants given by a sampling clock signal. In an implementation, a sampling clock generation circuit is configured to generate the sampling clock signal based on the data clock signal.

公开(公告)号：US20170366385A1

公开(公告)日：2017-12-21

申请号：US15184114

申请日：2016-06-16

Applicant: Infineon Technologies AG

Inventor： Andre Roger ,  Romain Ygnace ,  Juergen Schaefer ,  Matthias Marquardt ,  Ljudmil Anastasov

IPC: H04L27/26 ,  H04L27/10 ,  H04L27/02

CPC classification number: H04L27/2697 ,  H04L27/0014 ,  H04L27/02 ,  H04L27/10 ,  H04L2027/0016 ,  H04L2027/0018 ,  H04L2027/0055

Abstract: A modulator operable to control an oscillator is described. The modulator can include a memory that stores oscillator control values and a bit streaming block. The bit streaming block can generate a bit stream based on the oscillator control values and transmit the bit stream to the oscillator to control an oscillation frequency of the oscillator. The modulator can also include a bit streaming loader (BSL). The BSL can receive one or more of the oscillator control values from the memory, generate one or more corresponding bit values based on the one or more of the oscillator control values, and provide the one or more bit values to the bit streaming block. The bit streaming block can then generate the bit stream based the one or more bit values generated by the BSL.

公开(公告)号：US09417946B2

公开(公告)日：2016-08-16

申请号：US14337699

申请日：2014-07-22

Applicant: Infineon Technologies AG

Inventor： Antonio Vilela ,  Andre Roger

IPC: G06F11/07 ,  G06F11/16

CPC classification number: G06F11/0763 ,  G06F11/1641 ,  G06F11/1654 ,  G06F11/1695

Abstract: Embodiments relate to systems and methods for error containment in a system comprising detecting an error by processing an input signal by multiple processing units, and delaying at least one output signal of a processing unit to enable, in case an error has been detected, modifying at least one output signal of the processing unit that would cause propagation of the error through the system.

Abstract translation: 实施例涉及用于系统中的错误容纳的系统和方法，包括通过多个处理单元处理输入信号来检测错误，以及延迟处理单元的至少一个输出信号，以在检测到错误的情况下使得在 处理单元的至少一个输出信号将导致错误传播通过系统。

公开(公告)号：US09218236B2

公开(公告)日：2015-12-22

申请号：US13662846

申请日：2012-10-29

Applicant: Infineon Technologies AG

Inventor： Antonio Vilela ,  Andre Roger

IPC: G06F11/07

CPC classification number: G06F11/0793 ,  G06F11/0739 ,  G06F11/0757

Abstract: An error signal handling unit includes an error handler configured to receive an error signal indicating an error condition. The error handler is further configured to receive a recovery signal indicating a mitigation of the error condition or indicating that a mitigation of the error condition is possible. Furthermore, the error handler is further configured to output an error condition signal based on the error signal in response to a reception of the error signal if within a given delay time from the reception of the error signal, the error handler does not receive the recovery signal, and otherwise omit outputting the error condition signal.

Abstract translation: 错误信号处理单元包括错误处理器，该错误处理器被配置为接收指示错误状况的错误信号。 错误处理器还被配置为接收指示减轻错误状况的恢复信号或指示可以减轻错误状况。 此外，错误处理器还被配置为响应于错误信号的接收而输出基于误差信号的错误状态信号，如果在从接收到错误信号的给定延迟时间内，错误处理程序没有接收到恢复 信号，否则省略输出错误状态信号。

公开(公告)号：US20240248171A1

公开(公告)日：2024-07-25

申请号：US18413280

申请日：2024-01-16

Applicant: Infineon Technologies AG

Inventor： Mayeul Jeannin ,  Farhan Bin Khalid ,  Dian Tresna Nugraha ,  Andre Roger

IPC: G01S7/40 ,  G01S7/35

CPC classification number: G01S7/4008 ,  G01S7/354 ,  G01S7/356

Abstract: A method for calibrating a transmitter of a plurality of transmitters of a radar system is provided. The method includes setting the radar transmitter to be calibrated to a first Doppler Division Multiplexing (DDM) pattern and associating each of the other transmitters in the plurality with a respective second DDM pattern. A target is detected by performing radar detection with the plurality of transmitters, wherein the transmitter is operated with the first DDM pattern and each of the other transmitters is operated with its associated second DDM pattern, extracting Doppler Fourier transform coefficients for a Doppler spectrum peak corresponding to the target and for spurs associated with the peak, applying an inverse discrete Fourier transform to the extracted Doppler Fourier transform coefficients, detecting a phase error of the transmitter using a result of the inverse discrete Fourier transform and calibrating the transmitter according to the detected phase error.

公开(公告)号：US12019177B2

公开(公告)日：2024-06-25

申请号：US17038259

申请日：2020-09-30

Applicant: Infineon Technologies AG

Inventor： Andre Roger ,  Markus Bichl ,  Dian Tresna Nugraha ,  Romain Ygnace

IPC: G01S7/292 ,  G01S7/288 ,  G01S7/40 ,  G01S7/41 ,  G01S13/50 ,  H03M7/24 ,  H03M7/30

CPC classification number: G01S7/2923 ,  G01S7/288 ,  G01S7/4008 ,  G01S7/41 ,  G01S13/505 ,  H03M7/24 ,  H03M7/30 ,  G01S7/2883

Abstract: A method of handling radar signals of a radar system having a plurality of antennas is provided. The method may include generating a plurality of time-based radar signals based on a radar signal received by an associated antenna of the plurality of antennas, and transforming each time-based radar signal of the time-based radar signals into radar signals that each comprise a plurality of pairs of a frequency-based-value and an associated intensity value. The method includes storing the frequency-based-values and the intensity values of one frequency-based radar signal corresponding to one time-based radar signal of one antenna of the plurality of antennas; and storing each intensity value of the plurality of intensity values of another of the plurality of frequency-based radar signals based on a corresponding intensity value of the one frequency-based radar signal, wherein a stored representation of the intensity value of the other of the plurality of frequency-based radar signals has fewer bits than the corresponding stored intensity value.

公开(公告)号：US11899094B2

公开(公告)日：2024-02-13

申请号：US17587286

申请日：2022-01-28

Applicant: Infineon Technologies AG

Inventor： Mayeul Jeannin ,  Farhan Bin Khalid ,  Dian Tresna Nugraha ,  Andre Roger

IPC: G01S13/58

CPC classification number: G01S13/58

Abstract: Systems, methods, and circuitries are disclosed for compressing radar data. In one example, a method includes storing radar data in a memory, the radar data being stored in a data cube having a slow-time dimension, a fast-time dimension, and a channel dimension. The data cube is divided into one or more zones. For each zone a number of data matrices is selected based on a compression factor. Sets of data matrices containing the number of data matrices are formed and, for each set of data matrices, for each data matrix, the data vectors are coded to generate a coded data matrix. A coding for data vectors in a data matrix is the same and a coding for different data matrices is different. The coded data matrices are combined to generate a compressed data matrix for the zone and the compressed data matrices for the one or more zones are stored.

公开(公告)号：US20230243951A1

公开(公告)日：2023-08-03

申请号：US17587286

申请日：2022-01-28

Applicant: Infineon Technologies AG

Inventor： Mayeul Jeannin ,  Farhan Bin Khalid ,  Dian Tresna Nugraha ,  Andre Roger

IPC: G01S13/58

CPC classification number: G01S13/58

Abstract: Systems, methods, and circuitries are disclosed for compressing radar data. In one example, a method includes storing radar data in a memory, the radar data being stored in a data cube having a slow-time dimension, a fast-time dimension, and a channel dimension. The data cube is divided into one or more zones. For each zone a number of data matrices is selected based on a compression factor. Sets of data matrices containing the number of data matrices are formed and, for each set of data matrices, for each data matrix, the data vectors are coded to generate a coded data matrix. A coding for data vectors in a data matrix is the same and a coding for different data matrices is different. The coded data matrices are combined to generate a compressed data matrix for the zone and the compressed data matrices for the one or more zones are stored.

公开(公告)号：US11433910B2

公开(公告)日：2022-09-06

申请号：US16041031

申请日：2018-07-20

Applicant: Infineon Technologies AG

Inventor： Andre Roger ,  Farhan Bin Khalid ,  Romain Ygnace

IPC: B60W50/00

Abstract: An electronic control unit includes a signal input circuit configured to receive a sensor signal from a radar sensor or from a lidar Sensor and a processing circuit configured to determine a first condition based on a first representation of the sensor signal, and to generate an activation signal in response to the first condition.

公开(公告)号：US11422249B2

公开(公告)日：2022-08-23

申请号：US16855174

申请日：2020-04-22

Applicant: Infineon Technologies AG

Inventor： Andre Roger ,  Farhan Bin Khalid ,  Paul Meissner ,  Dian Tresna Nugraha ,  Romain Ygnace

IPC: G01S13/58 ,  G01S7/35 ,  G01S7/00 ,  G01S13/931

Abstract: The present disclosure relates to a radar device including a first radar-IC for processing first receive signals from first antennas of an antenna array, wherein the first radar-IC is configured to determine a first range-Doppler map based on the first receive signals, and to determine a first subregion of the first range-Doppler map based on criteria of interest. The radar device also includes at least a second radar-IC for processing second receive signals from second antennas of the antenna array, wherein the second radar-IC is configured to determine a second range-Doppler map based on the second receive signals, and to determine a second subregion of the second range-Doppler map based on the criteria of interest. A data interface is configured to forward information indicative of the first and/or the second subregions to a common processor for further processing.