公开(公告)号：US20210202403A1

公开(公告)日：2021-07-01

申请号：US16728127

申请日：2019-12-27

Applicant: Intel Corporation

Inventor： Feras Eid ,  Veronica Aleman Strong ,  Aleksandar Aleksov ,  Adel A. Elsherbini ,  Johanna M. Swan

IPC: H01L23/60 ,  H01L23/498 ,  H01L25/16 ,  H01L23/538 ,  H01L25/065

Abstract: Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). In some embodiments, an IC component may include: a first conductive structure; a second conductive structure; and a material in contact with the first conductive structure and the second conductive structure, wherein the material has a first electrical conductivity before illumination of the material with optical radiation and a second electrical conductivity, different from the first electrical conductivity, after illumination of the material with optical radiation.

公开(公告)号：US20210193519A1

公开(公告)日：2021-06-24

申请号：US16721243

申请日：2019-12-19

Applicant: INTEL CORPORATION

Inventor： Aleksandar Aleksov ,  Telesphor Kamgaing ,  Georgios Dogiamis ,  Feras Eid ,  Johanna M. Swan ,  Shawna M. Liff

IPC: H01L21/768 ,  H01L23/00

Abstract: Disclosed herein are inorganic dies with organic interconnect layers and related structures, devices, and methods. In some embodiments, an integrated circuit (IC) structure may include an inorganic die and one or more organic interconnect layers on the inorganic die, wherein the organic interconnect layers include an organic dielectric.

公开(公告)号：US20210193518A1

公开(公告)日：2021-06-24

申请号：US16721235

申请日：2019-12-19

Applicant: INTEL CORPORATION

Inventor： Aleksandar Aleksov ,  Feras Eid ,  Telesphor Kamgaing ,  Georgios Dogiamis ,  Johanna M. Swan

IPC: H01L21/768 ,  H01L23/00

Abstract: Disclosed herein are inorganic dies with organic interconnect layers and related structures, devices, and methods. In some embodiments, an integrated circuit (IC) structure may include an inorganic die and one or more organic interconnect layers on the inorganic die, wherein the organic interconnect layers include an organic dielectric.

公开(公告)号：US20210125931A1

公开(公告)日：2021-04-29

申请号：US16667698

申请日：2019-10-29

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Aleksandar Aleksov ,  Feras Eid ,  Telesphor Kamgaing ,  Johanna M. Swan

IPC: H01L23/538 ,  B81B7/00 ,  H01L23/28 ,  H01L23/552 ,  H01L21/56

Abstract: Embodiments may relate to a microelectronic package that includes a substrate with an overmold material. The microelectronic package may include a die in the overmold material, and an inactive side of the die may be coupled with a face of the substrate. A through-mold via (TMV) may be present in the overmold material. The TMV may be communicatively coupled with the substrate, and an active side of the die may be communicatively coupled with the TMV by a trace in the overmold material. Other embodiments may be described or claimed.

公开(公告)号：US10971453B2

公开(公告)日：2021-04-06

申请号：US16335845

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Johanna M. Swan ,  Shawna M. Liff ,  Henning Braunisch ,  Krishna Bharath ,  Javier Soto Gonzalez ,  Javier A. Falcon

IPC: H01L23/538 ,  H01L25/065 ,  H01L25/03 ,  H01L23/498 ,  H01L25/18 ,  H01L21/48 ,  H01L23/00 ,  H01L25/00

Abstract: Various embodiments disclosed relate to a semiconductor package. The present semiconductor package includes a substrate. The substrate is formed from alternating conducting layers and dielectric layers. A first active electronic component is disposed on an external surface of the substrate, and a second active electronic component is at least partially embedded within the substrate. A first interconnect region is formed from a plurality of interconnects between the first active electronic component and the second active electronic component. Between the first active electronic component and the substrate a second interconnect region is formed from a plurality of interconnects. Additionally, a third interconnect region is formed from a plurality of interconnects between the second active electronic component and the substrate.

公开(公告)号：US10950919B2

公开(公告)日：2021-03-16

申请号：US16325522

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Georgios C. Dogiamis ,  Sasha N. Oster ,  Adel A. Elsherbini ,  Brandon M. Rawlings ,  Aleksandar Aleksov ,  Shawna M. Liff ,  Richard J. Dischler ,  Johanna M. Swan

IPC: H01P5/02 ,  H01P3/12 ,  H01P3/16 ,  H01P1/04 ,  H01P1/02 ,  H01P11/00

Abstract: An apparatus comprises a waveguide section including an outer layer of conductive material tubular in shape and having multiple ends; and a joining feature on at least one of the ends of the waveguide section configured for joining to a second separate waveguide section.

公开(公告)号：US20210067132A1

公开(公告)日：2021-03-04

申请号：US16550673

申请日：2019-08-26

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Georgios Dogiamis ,  Feras Eid ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: H03H9/08 ,  H01L27/20 ,  H03H9/70 ,  H01L23/552 ,  H01L23/367 ,  H01L25/16 ,  H01L23/498 ,  H03H3/02 ,  H03H9/54 ,  H03H9/05 ,  H01L23/66

Abstract: Embodiments may relate to a radio frequency (RF) front-end module (FEM). The RF FEM may include an integrated die with an active portion and an acoustic wave resonator (AWR) portion adjacent to the active portion. The RF FEM may further include a lid coupled with the die. The lid may at least partially overlap the AWR portion at a surface of the die. Other embodiments may be described or claimed.

公开(公告)号：US20210043543A1

公开(公告)日：2021-02-11

申请号：US16533065

申请日：2019-08-06

Applicant: Intel Corporation

Inventor： Feras Eid ,  Telesphor Kamgaing ,  Georgios Dogiamis ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: H01L23/427 ,  H01L23/00 ,  H03H9/46 ,  H01L23/48 ,  H01L23/66 ,  H01L23/31 ,  H01L23/373 ,  H01L23/38

Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.

公开(公告)号：US20210041182A1

公开(公告)日：2021-02-11

申请号：US16533235

申请日：2019-08-06

Applicant: Intel Corporation

Inventor： Feras Eid ,  Telesphor Kamgaing ,  Georgios Dogiamis ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: F28D15/04 ,  H01L23/367 ,  H01L23/38 ,  H01L23/427

Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.

公开(公告)号：US10903818B2

公开(公告)日：2021-01-26

申请号：US15089001

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Vijay K. Nair ,  Feras Eid ,  Adel A. Elsherbini ,  Telesphor Kamgaing ,  Georgios C. Dogiamis ,  Valluri R. Rao ,  Johanna M. Swan

IPC: H03H9/54 ,  H03H9/05 ,  H03H9/58 ,  G06F1/18 ,  H03H9/56

Abstract: Embodiments of the invention include a piezoelectric package integrated filtering device that includes a film stack. In one example, the film stack includes a first electrode, a piezoelectric material in contact with the first electrode, and a second electrode in contact with the piezoelectric material. The film stack is suspended with respect to a cavity of an organic substrate having organic material and the film stack generates an acoustic wave to be propagated across the film stack in response to an application of an electrical signal between the first and second electrodes.