公开(公告)号：US20180352477A1

公开(公告)日：2018-12-06

申请号：US15765694

申请日：2016-03-02

Applicant: Intel Corporation

Inventor： Sarabjot Singh ,  Shu-Ping Yeh ,  Nageen Himayat

IPC: H04W28/08 ,  H04W72/04

CPC classification number: H04W76/15 ,  H04W72/0486

Abstract: Apparatus, systems, and methods for network utility maximization with multiple radio access technology (multi-RAT) aggregation in communication systems are described.

公开(公告)号：US20180241493A1

公开(公告)日：2018-08-23

申请号：US15751003

申请日：2015-09-18

Applicant: Intel Corporation

Inventor： Ping Wang ,  Feng Xue ,  Yang-Seok Choi ,  Shu-Ping Yeh ,  Shilpa Talwar

IPC: H04J11/00 ,  H04W24/10 ,  H04W72/08 ,  H04W24/04 ,  H04W24/08 ,  H04W72/04

CPC classification number: H04J11/0026 ,  H04L5/14 ,  H04W24/04 ,  H04W24/08 ,  H04W24/10 ,  H04W72/0406 ,  H04W72/082 ,  H04W72/1231

Abstract: Apparatus, systems, and methods to identify victims and aggressors of interference in full duplex communication systems are described. In one example, a controller comprises logic to detect a quality of service issue in a wireless communication downlink with a first user equipment in a first cell and in response to detecting the quality of service issue, determine whether the user equipment is a victim of interference from a second user equipment or is a victim of interference from a downlink with a second user equipment in a second cell. Other examples are also disclosed and claimed.

公开(公告)号：US09698862B2

公开(公告)日：2017-07-04

申请号：US14751246

申请日：2015-06-26

Applicant: Intel Corporation

Inventor： Yang-Seok Choi ,  Feng Xue ,  Shu-Ping Yeh ,  Shilpa Talwar

IPC: H04B1/44 ,  H04B1/525 ,  H04B1/48

CPC classification number: H04B1/525 ,  H04B2001/485

Abstract: Disclosed are a method, computing device, and a non-transitory computer-readable medium storing computer-executable instructions which, when executed, cause a processor to perform operations, which may include: sending a transmit signal including non-linear elements; receiving another signal comprising at least a portion of the transmit signal through a receive chain of a computing device; simulating the transmit chain; generating, by the simulated transmit chain, a first signal associated with the transmit signal; generating a second signal by frequency shifting the first signal; generating one or more first kernels associated with the second signal; performing decimation of the one or more first kernels; transforming the one or more first kernels using a lower triangular matrix, into one or more second kernels; combining the one or more second kernels to generate an echo cancellation signal; and subtracting the echo cancellation signal from the received at least a portion of the transmit signal.

公开(公告)号：US20170111079A1

公开(公告)日：2017-04-20

申请号：US15393309

申请日：2016-12-29

Applicant: Intel Corporation

Inventor： Feng Xue ,  Yang-Seok Choi ,  Shu-Ping Yeh ,  Shilpa Talwar ,  Roya Doostnejad

IPC: H04B1/44 ,  H04B1/525

CPC classification number: H04B1/44 ,  H04B1/525 ,  H04B17/391

Abstract: A method of processing signals may include identifying a plurality of critical elements of a parameter vector based on one or more predefined criteria, wherein the parameter vector represents a relationship between the input signal vector and the output signal vector; identifying a reduced parameter update vector having a plurality of elements, wherein the elements are selected according to a criterion related to the relationship between the input signal vector and the output signal vector; updating the plurality of critical elements of the parameter vector using the reduced parameter update vector to generate an updated parameter vector, wherein the reduced parameter update vector has less elements than the parameter vector; and processing one or more signals associated with the input signal vector using the updated parameter vector.

公开(公告)号：US20170085252A1

公开(公告)日：2017-03-23

申请号：US14861421

申请日：2015-09-22

Applicant: Intel Corporation

Inventor： Farhana Sheikh ,  Ching-En Lee ,  Feng Xue ,  Anuja S. Vaidya ,  Eduardo X. Alban ,  Albert Oskar Filip Andersson ,  Chia-Hsiang Chen ,  Shu-Ping Yeh

IPC: H03H21/00 ,  G06F17/16

CPC classification number: H03H21/0012 ,  G06F9/3877 ,  G06F17/16 ,  H03H2021/0049 ,  H03H2021/0094 ,  H03H2218/06 ,  H04B1/525

Abstract: An adaptation hardware accelerator comprises a calculation unit configured to receive a plurality of inputs at one or more predefined time intervals, wherein each time interval corresponds to a calculation iteration, the plurality of inputs being associated with a plurality of adaptive filters each having a plurality of taps, and determine a correlation data and a cross-correlation data based thereon for a given calculation iteration. The correlation data comprises a correlation matrix comprising a plurality of sub-matrices, wherein determining the correlation matrix comprises determining only the submatrices in an upper triangular portion and a diagonal portion of the correlation matrix. Further, the adaptation hardware accelerator comprises an adaptation core unit configured to determine a plurality of adaptive weights associated with the plurality of adaptive filters, respectively, based on an optimized RLS based adaptive algorithm, by utilizing the correlation data and the cross correlation data. In addition, the hardware accelerator unit comprises a convergence detector unit configured to determine a convergence parameter; and a controller configured to generate an iteration signal for each of the predefined time intervals based on the convergence parameter. The iteration signal communicates to the calculation unit and the adaptation core unit to continue with a next calculation iteration or to conclude, wherein the conclusion indicates a determination of a final value of the plurality of the adaptive weights by the adaptation core unit.

公开(公告)号：US20160380666A1

公开(公告)日：2016-12-29

申请号：US14751181

申请日：2015-06-26

Applicant: Intel Corporation

Inventor： Feng Xue ,  Yang-Seok Choi ,  Shu-Ping Yeh ,  Shilpa Talwar ,  Roya Doostnejad

IPC: H04B1/44 ,  H04B17/391

CPC classification number: H04B1/44 ,  H04B1/525 ,  H04B17/391

Abstract: A method of processing signals may include calculating a covariance matrix and a correlation vector based on an input signal vector and an output signal vector; identifying a plurality of critical elements of a parameter vector based on a predefined criteria, wherein the parameter vector describes a relationship between the input signal vector and the output signal vector; calculating a solution to a linear system to generate a reduced parameter update vector having a plurality of elements, wherein the linear system is based on the plurality of critical elements of the parameter vector, the covariance matrix, and the correlation vector; updating the plurality of critical elements of the parameter vector using the reduced parameter update vector to generate an updated parameter vector, wherein the reduced parameter update vector has less elements than the parameter vector; and processing one or more signals associated with the input signal vector using the updated parameter vector.

Abstract translation: 处理信号的方法可以包括：基于输入信号向量和输出信号向量来计算协方差矩阵和相关向量; 基于预定准则来识别参数向量的多个关键元素，其中所述参数向量描述所述输入信号向量与所述输出信号向量之间的关系; 计算线性系统的解以产生具有多个元素的简化参数更新向量，其中线性系统基于参数向量，协方差矩阵和相关向量的多个关键元素; 使用所述简化参数更新向量来更新所述参数向量的所述多个关键元素以生成更新参数向量，其中所述简化参数更新向量具有比所述参数向量更少的元素; 以及使用更新的参数向量处理与所述输入信号向量相关联的一个或多个信号。

公开(公告)号：US20160183281A1

公开(公告)日：2016-06-23

申请号：US14127015

申请日：2013-09-27

Applicant: INTEL CORPORATION

Inventor： Shu-Ping Yeh ,  Nageen Himayat ,  Ali Yazdan Panah ,  Shilpa Talwar

IPC: H04W72/12 ,  H04W36/30

CPC classification number: H04W36/20 ,  H04B7/0417 ,  H04B7/0452 ,  H04B7/0626 ,  H04J3/0614 ,  H04J11/00 ,  H04J11/0023 ,  H04L1/0027 ,  H04L5/0046 ,  H04L5/0048 ,  H04L5/006 ,  H04L61/3005 ,  H04L61/3075 ,  H04L67/104 ,  H04W4/70 ,  H04W8/005 ,  H04W16/20 ,  H04W16/24 ,  H04W16/26 ,  H04W24/02 ,  H04W24/04 ,  H04W24/08 ,  H04W24/10 ,  H04W28/0268 ,  H04W28/04 ,  H04W28/24 ,  H04W36/14 ,  H04W36/30 ,  H04W52/0216 ,  H04W52/0235 ,  H04W60/04 ,  H04W64/003 ,  H04W72/0413 ,  H04W72/042 ,  H04W72/0446 ,  H04W72/06 ,  H04W72/08 ,  H04W72/1231 ,  H04W74/0858 ,  H04W76/14 ,  H04W76/27 ,  H04W76/28 ,  H04W88/02 ,  H04W88/06 ,  H04W88/08 ,  H04W88/16 ,  Y02D70/00 ,  Y02D70/1222 ,  Y02D70/1224 ,  Y02D70/1226 ,  Y02D70/1242 ,  Y02D70/1262 ,  Y02D70/1264 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/146 ,  Y02D70/164 ,  Y02D70/166 ,  Y02D70/21 ,  Y02D70/22 ,  Y02D70/24 ,  Y02D70/25 ,  Y02D70/26 ,  Y02D70/444

Abstract: In a multiple Radio Access Technology (multi-RAT) heterogeneous wireless network, a user equipment (UE) is capable of communicating via multiple types technologies, such as both WiFi and Long Term Evolution (LTE) cellular. The evolved node B that the UE communicates with may be a small network, encompassing distances of 200 meters or less. A method communicating in such a network may involve using an on-time throughput scheduling algorithm that maximizes the throughput by handing off certain users and prioritizing communications based on specific criteria. These criteria may include prioritizing communications of users closest to a target threshold. The UE may communicate with the network to negotiate which radio access technology is to be used, a range of acceptable data rates.

Abstract translation: 在多重无线接入技术（multi-RAT）异构无线网络中，用户设备（UE）能够通过诸如WiFi和长期演进（LTE）蜂窝的多种技术进行通信。 UE通信的演进节点B可以是包含200米或更小的距离的小型网络。 在这种网络中通信的方法可以包括使用准时吞吐量调度算法，其通过移交某些用户并基于特定标准来优先化通信来使吞吐量最大化。 这些标准可以包括优先考虑最接近目标阈值的用户的通信。 UE可以与网络通信以协商要使用哪种无线电接入技术，可接受的数据速率的范围。