Method and apparatus for RF communication system signal to noise ratio improvement
    41.
    发明授权
    Method and apparatus for RF communication system signal to noise ratio improvement 有权
    RF通信系统的信噪比改善方法和装置

    公开(公告)号:US08010055B2

    公开(公告)日:2011-08-30

    申请号:US12030300

    申请日:2008-02-13

    申请人: Kenneth V. Buer

    发明人: Kenneth V. Buer

    IPC分类号: H04B1/44

    CPC分类号: H04B1/50

    摘要: The signal to noise ratio performance of a RF communication system can be improved by providing resistance to transmitter self-jamming and eliminating or reducing the need for a transmit rejection filter or other measures such as limiters or blanking switches. An anti-jam low noise amplifier provides enough rejection and jamming immunity to reduce or eliminate the need for the transmit reject filter. Thus, the system noise performance is improved by eliminating the filter and the associated losses which cause signal to noise ratio performance degradation.

    摘要翻译: RF通信系统的信噪比性能可以通过提供对发射机自身干扰的抵抗以及消除或减少对发射抑制滤波器或其他措施如限制器或消隐交换机的需要来改善。 抗干扰低噪声放大器提供足够的抑制和干扰抗扰度,以减少或消除对发射拒绝滤波器的需要。 因此,通过消除导致信噪比性能下降的滤波器和相关联的损耗来提高系统噪声性能。

    INTEGRATED ORTHOMODE TRANSDUCER
    42.
    发明申请
    INTEGRATED ORTHOMODE TRANSDUCER 有权
    集成ORODOMODE传感器

    公开(公告)号:US20100285758A1

    公开(公告)日:2010-11-11

    申请号:US12268840

    申请日:2008-11-11

    IPC分类号: H04B1/38 H01Q1/24

    摘要: A method and system for an integrated transceiver is presented. The integrated transceiver includes a transceiver housing, where a waveguide is formed inside the transceiver housing using a housing base and a sub-floor component. Neither the housing base nor the sub-floor component alone is configured to operate as a waveguide. In an exemplary embodiment, a portion of the waveguide is cast into the housing base and is part of the transceiver housing. Furthermore, in an exemplary embodiment, an antenna system includes a feed horn, a polarizer, the integrated transceiver, and a transceiver circuit that communicates with the waveguide to transmit and receive radio frequency signals. The integrated transceiver, in the exemplary embodiment, includes a transceiver housing base that forms a portion of an integrated waveguide assembly, and another portion of the integrated waveguide assembly aligns with the transceiver housing base to form the integrated waveguide assembly.

    摘要翻译: 提出了一种集成收发器的方法和系统。 集成收发器包括收发器壳体,其中使用壳体底座和副底板部件在收发器壳体内部形成波导。 壳体基座和底板部件单独都不配置为作为波导进行操作。 在示例性实施例中,波导的一部分被铸造到壳体基座中并且是收发器壳体的一部分。 此外,在示例性实施例中,天线系统包括馈电喇叭,偏振器,集成收发器和与波导通信以发送和接收射频信号的收发器电路。 在示例性实施例中,集成收发器包括形成集成波导组件的一部分的收发机壳体基座,并且集成波导组件的另一部分与收发机壳体基座对准以形成集成波导组件。

    FLIP-CHIP FET CELL
    43.
    发明申请

    公开(公告)号:US20100246153A1

    公开(公告)日:2010-09-30

    申请号:US12409917

    申请日:2009-03-24

    申请人: Kenneth V. Buer

    发明人: Kenneth V. Buer

    摘要: A method and system for a FET cell is presented. The FET cell includes multiple individual transistors and interconnect bumps that are configured to flip-chip connect to a substrate. The substrate may have the majority of a matching structure for the FET cell. Furthermore, the FET cell may include a stability circuit in communication with the terminals of the individual transistors and further in communication with the interconnect bumps. Additionally, different materials can be used in combination in the FET cell and the separate substrate having the majority of the matching structure. Various materials may be more efficiency used in a FET cell, while other materials are suitable for the separate substrate.

    摘要翻译: 介绍了一种FET单元的方法和系统。 FET单元包括多个独立的晶体管和配置成倒装芯片连接到基板的互连凸块。 衬底可以具有用于FET单元的大部分匹配结构。 此外,FET单元可以包括与各个晶体管的端子通信并且还与互连凸块连通的稳定电路。 另外,在FET单元和具有大部分匹配结构的单独衬底中可以组合使用不同的材料。 各种材料可以在FET电池中更有效地使用,而其它材料适合于单独的衬底。

    DUAL CONVERSION TRANSMITTER WITH SINGLE LOCAL OSCILLATOR
    44.
    发明申请
    DUAL CONVERSION TRANSMITTER WITH SINGLE LOCAL OSCILLATOR 有权
    具有单个本地振荡器的双转换发射器

    公开(公告)号:US20100117693A1

    公开(公告)日:2010-05-13

    申请号:US12614293

    申请日:2009-11-06

    IPC分类号: H03L7/06

    CPC分类号: H03D7/163

    摘要: The present disclosure relates to systems, devices and methods related to transmitters, and/or transceivers having a single, tunable oscillator in a dual conversion architecture. In various exemplary embodiments, this transmitter may include: a first mixer configured to receive a first oscillator signal from the single oscillator; a filter configured to band pass filter the converted signal and output a filtered signal; and a second mixer in communication with the filter, configured to receive the filtered signal. This dual conversion transmitter may be configured to receive a communication signal from an input to the transmitter and to output a converted signal based on the first oscillator signal and the communication signal. The second mixer may be configured to receive a scaled version of the first oscillator signal and to output a desired frequency output signal based on the scaled version of the first oscillator signal and the filtered signal.

    摘要翻译: 本公开涉及与发射机有关的系统,设备和方法,和/或在双转换架构中具有单个可调谐振荡器的收发器。 在各种示例性实施例中,该发射机可以包括:第一混频器,被配置为从单个振荡器接收第一振荡器信号; 滤波器,被配置为对转换的信号进行带通滤波并输出滤波信号; 以及与滤波器通信的第二混频器,被配置为接收经滤波的信号。 该双转换发射机可以被配置为接收从输入到发射机的通信信号,并且基于第一振荡器信号和通信信号输出转换的信号。 第二混频器可以被配置为接收第一振荡器信号的缩放版本,并且基于第一振荡器信号和滤波信号的缩放版本输出期望的频率输出信号。

    POWER EFFICIENT MULTISTAGE AMPLIFIER AND DESIGN METHOD
    45.
    发明申请
    POWER EFFICIENT MULTISTAGE AMPLIFIER AND DESIGN METHOD 有权
    功率有效的多功能放大器和设计方法

    公开(公告)号:US20090295487A1

    公开(公告)日:2009-12-03

    申请号:US12538437

    申请日:2009-08-10

    IPC分类号: H03F3/68 G06F17/50

    CPC分类号: H03F3/189 H03F1/02

    摘要: A multistage amplifier and design method are disclosed. The multistage amplifier has a plurality of amplifier stages, each stage having an amplifier designed and biased to operate at or near the amplifier's power added efficiency (PAE) peak. The PAE peak of each of the amplifier is at or near the amplifiers linear-compression transition region, providing a multistage power amplifier that is power efficient and has desirable amplitude to amplitude and amplitude to phase power transfer characteristics. The amplifier is designed by matching the output impedance of a final stage with a load. Amplifier stages are iteratively designed from the last stage to the first. At each stage, an amplifier and drive circuit are designed. The drive circuit and amplifier are designed to provide each stage with output impedance matched to the input impedance of the following stage and to operate at or near the PAE peak of the amplifier.

    摘要翻译: 公开了一种多级放大器和设计方法。 多级放大器具有多个放大器级,每级具有设计和偏置以在放大器的功率增加效率(PAE)峰值附近操作的放大器。 每个放大器的PAE峰值处于或靠近放大器线性压缩过渡区域,提供功率有效的多级功率放大器,并具有期望的振幅和幅度与相位功率传输特性。 放大器的设计是通过匹配最后一级的输出阻抗与负载。 从最后阶段到第一阶段迭代设计放大器级。 在每个阶段,设计放大器和驱动电路。 驱动电路和放大器被设计成为每个级提供与下一级的输入阻抗匹配的输出阻抗,并在放大器的PAE峰值处或附近工作。

    METHOD AND APPARATUS FOR RF COMMUNICATION SYSTEM SIGNAL TO NOISE RATIO IMPROVEMENT
    46.
    发明申请
    METHOD AND APPARATUS FOR RF COMMUNICATION SYSTEM SIGNAL TO NOISE RATIO IMPROVEMENT 有权
    用于RF通信系统信号到噪声比改进的方法和装置

    公开(公告)号:US20090203328A1

    公开(公告)日:2009-08-13

    申请号:US12030300

    申请日:2008-02-13

    申请人: Kenneth V. Buer

    发明人: Kenneth V. Buer

    IPC分类号: H04B1/44

    CPC分类号: H04B1/50

    摘要: The signal to noise ratio performance of a RF communication system can be improved by providing resistance to transmitter self-jamming and eliminating or reducing the need for a transmit rejection filter or other measures such as limiters or blanking switches. An anti-jam low noise amplifier provides enough rejection and jamming immunity to reduce or eliminate the need for the transmit reject filter. Thus, the system noise performance is improved by eliminating the filter and the associated losses which cause signal to noise ratio performance degradation.

    摘要翻译: RF通信系统的信噪比性能可以通过提供对发射机自身干扰的抵抗以及消除或减少对发射抑制滤波器或其他措施如限制器或消隐交换机的需要来改善。 抗干扰低噪声放大器提供足够的抑制和干扰抗扰度,以减少或消除对发射拒绝滤波器的需要。 因此,通过消除导致信噪比性能下降的滤波器和相关联的损耗来提高系统噪声性能。

    SYSTEMS, DEVICES, AND METHODS FOR SUPPRESSING FREQUENCY SPURS IN MIXERS
    47.
    发明申请
    SYSTEMS, DEVICES, AND METHODS FOR SUPPRESSING FREQUENCY SPURS IN MIXERS 有权
    用于抑制混合器中频率冲击的系统,装置和方法

    公开(公告)号:US20090149150A1

    公开(公告)日:2009-06-11

    申请号:US11950831

    申请日:2007-12-05

    IPC分类号: H04B1/26

    CPC分类号: H03D7/02

    摘要: Systems, devices and methods are disclosed for suppressing the 2LO frequency spur, output from a mixer. In various exemplary embodiments, a DC bias circuit is electrically connected to provide DC bias to one or more non-linear elements of the mixer. The biasing voltage is used to cause the current-voltage characteristics and/or junction capacitances between non-linear elements to be more symmetric and/or to suppress 2LO leakage currents that form 2LO frequency spurs at the output of the mixer. The non-linear elements may comprise one of: BJT's, diodes, and FET's. The mixer may be one of: a subharmonic mixer; a fundamental resistive mixer; a fundamental subharmonic transconductance mixer; and a fundamental transconductance mixer comprising an anti-parallel diode pair. The system may further be configured to automatically determine an appropriate DC bias voltage level that will improve one of the LO-IF isolation and the LO-RF isolation.

    摘要翻译: 公开了用于抑制从混频器输出的2LO频率支线的系统,装置和方法。 在各种示例性实施例中,DC偏置电路电连接以向混频器的一个或多个非线性元件提供DC偏置。 偏置电压用于使非线性元件之间的电流 - 电压特性和/或结电容更为对称和/或抑制在混频器输出端形成2LO频率杂散的2LO漏电流。 非线性元件可以包括以下之一:BJT,二极管和FET。 混合器可以是以下之一:次谐波混合器; 基本电阻混频器; 一种基本的次谐波跨导混频器; 以及包括反并联二极管对的基本跨导混频器。 该系统还可以被配置为自动确定将改善LO-IF隔离和LO-RF隔离之一的适当DC偏置电压电平。

    IF INTERFACE
    48.
    发明申请
    IF INTERFACE 有权
    如果接口

    公开(公告)号:US20090103596A1

    公开(公告)日:2009-04-23

    申请号:US11876501

    申请日:2007-10-22

    IPC分类号: H04B1/38

    CPC分类号: H04B1/40 H04B1/18

    摘要: Systems, devices, and methods may be provided for communicating telemetry signals between a satellite modem and transceiver over an IF receive link. In an exemplary embodiment, a communication system comprises a modem, a transceiver, an IF receive communication link coupling the modem and the transceiver and configured to allow IF communication between the modem and the transceiver, and a transceiver interface module and a modem interface module, wherein the modules are configured to allow telemetry communication between the modem and the transceiver over the IF receive communication link.

    摘要翻译: 可以提供系统,设备和方法,用于通过IF接收链路在卫星调制解调器和收发器之间传送遥测信号。 在示例性实施例中,通信系统包括调制解调器,收发器,耦合调制解调器和收发器的IF接收通信链路,并且被配置为允许调制解调器和收发器之间的IF通信,以及收发器接口模块和调制解调器接口模块, 其中所述模块被配置为允许所述调制解调器和所述收发器之间通过所述IF接收通信链路进行遥测通信。

    High power block upconverter
    49.
    发明授权

    公开(公告)号:US07035617B2

    公开(公告)日:2006-04-25

    申请号:US10066024

    申请日:2002-01-29

    IPC分类号: H04B1/26

    CPC分类号: H04B1/26

    摘要: A system and method for high power block upconversion having a stand-alone and surface-mountable component is provided. The HP-BUC system of the invention provides a “drop-in” component capable of mixing a local oscillator signal with an IF signal to produce an RF signal in the millimeter-wave and higher bands. In addition, the HP-BUC provides filtering of unwanted spurious signals and requires no further signal amplification prior to transmission, for example in a satellite communications system.

    System and method for uplink power control
    50.
    发明授权
    System and method for uplink power control 有权
    用于上行链路功率控制的系统和方法

    公开(公告)号:US06771930B2

    公开(公告)日:2004-08-03

    申请号:US09867008

    申请日:2001-05-29

    申请人: Kenneth V. Buer

    发明人: Kenneth V. Buer

    IPC分类号: H04H100

    CPC分类号: H04B7/18513

    摘要: An uplink power control system and method of the present invention includes a current sensing technique for predicting the P1 dB power compression point. A DC current sensor detects the level of DC current transmitted from a control unit to an antenna unit of the system. The current measurements are analyzed to generate a theoretical prediction of amplifier linearity as the power levels are increased. The change in DC current indicates an inflection point where the amplifier no longer behaves linearly to an increase in RF power. The inflection point is found by determining the various derivatives of the DC current curve. Analyzing the derivatives not only provides an accurate and consistent assessment of the P1 dB compression point, but also provides a prediction of the output power, and thus future performance of the system.

    摘要翻译: 本发明的上行链路功率控制系统和方法包括用于预测P1dB功率压缩点的电流检测技术。 直流电流传感器检测从控制单元发送到系统的天线单元的直流电流的电平。 分析电流测量值以产生功率电平增加时放大器线性度的理论预测。 直流电流的变化指示放大器不再像RF功率的增加线性地变化的拐点。 通过确定直流电流曲线的各种导数来找到拐点。 分析衍生物不仅可以提供对P1 dB压缩点的准确和一致的评估,而且可以提供输出功率的预测,从而提供系统未来的性能。