摘要:
An RTP packet generating unit 11 packetizes data into packets, and adds identification information to the header of each of the packets, the identification information identifying each of the packets. An RTP packet encrypting unit 13 divides data included in each of the generated packets into blocks, and encrypts the data included in each of the packets on a block-by-block basis using an encryption key which an encryption key sharing unit 12 shares with a receiving client in such a manner that, when encrypting a first block of the data, the packet encrypting unit encrypts it using the identification information for identifying each of the packets, which is contained, as an initial vector, in the header of each of the packets, and, when encrypting each subsequent block of the data, encrypts it according to an encryption method which uses an immediately-previously-encrypted block.
摘要:
When a photo album for an event such as a wedding ceremony is generated, images to be inserted in image insertion areas in a template can be selected easily. A professional photographer photographs a bride and groom on the wedding day and obtains a plurality of images. Characteristic quantities of scenes represented by the images are calculated, and the images are classified in image groups of respective scenes. The scenes, image groups and image insertion areas of the template for album are related to each other. An event bar is displayed on an editing screen. When a desired scene button is selected, a catalog of images of an image group corresponding to the scene represented by the selected scene button, and the image insertion areas of the template are displayed on the editing screen.
摘要:
Configurable error handling apparatus and methods to operate the same are disclosed. An example apparatus comprises a processor core in a semiconductor package, a hardware functional block in the semiconductor package, an error handler in the semiconductor package, wherein the error handler is configurable to route error data from the hardware functional block to at least one of a first error log or a second error log and to route error signals from the hardware functional block to at least one of an operating system or firmware, and wherein the processor core configures the error handler and the hardware functional block.
摘要:
An object is to provide a work vehicle whose drive portion can be downsized. An engine having an engine output shaft, an electric motor driven by a battery which is attached integrally to the engine output shaft so as to drive the engine output shaft, a traveling drive portion having a transmission connected to the engine output shaft and a traveling drive shaft which is rotated by the transmission and which moves the traveling wheels, a work drive portion selectively performing work by means of power from the engine output shaft, a generator charging the battery, a traveling regeneration portion transmitting regenerative energy of the traveling drive portion to the generator, a work regeneration portion transmitting regenerative energy of a fork drive portion to the generator, and a one-way clutch for traveling and a one-way clutch for work provided, respectively, to the traveling regeneration portion and the work regeneration portion, which suppress transmission of motive power from the generator, are included.
摘要:
Embodiments described herein disclose a system for enabling emulation of a MIMD ISA extension which supports user-level sequencer management and control, and a set of privileged code executed by both operating system managed sequencers and application managed sequencers, including different sets of persistent per-CPU and per-thread data. In one embodiment, a lightweight code layer executes beneath the operating system. This code layer is invoked in response to particular monitored events, such as the need for communication between an operating system managed sequencer and an application managed sequencer. Control is transferred to this code layer, for execution of special operations, after which control returns back to originally executing code. The code layer is normally dormant and can be invoked at any time when either a user application or the operating system is executing.
摘要:
Use of data poisoning techniques may permit proactive operating system recovery without needing to always bringing down the operating system when uncorrectable errors are encountered.
摘要:
A method and apparatus calculate a page table index from a virtual address. Employs a combined hash algorithm that supports two different hash page table configurations. A “short format” page table is provided for each virtual region, is linear, has a linear entry for each translation in the region, and does not store tags or chain links. A single “long format” page table is provided for the entire system, supports chained segments, and includes hash tag fields. The method of the present invention forms an entry address from a virtual address, with the entry address referencing an entry of the page table. To form the entry address, first a hash page number is formed from the virtual address by shifting the virtual address right based on the page size of the region of the virtual address. If the computer system is operating with long format page tables, the next step is to form a hash index by combining the hash page number and the region identifier referenced by the region portion of the virtual address, and to form a table offset by shifting the hash index left by K bits, wherein each long format page table entry is 2K bytes long. However, if the computer system is operating with short format page tables, the next step is to form a hash index by setting the hash index equal to the hash page number, and to form a table offset by shifting the hash index left by L bits, wherein each short format page table entry is 2L bytes long. Next, a mask is formed based on the size of the page table. A first address portion is then formed using the base address of the page table and the mask, and a second address portion is formed using the table offset and the mask. Finally, the entry address is formed by combining the first and second address portions. By providing a single algorithm capable of generating a page table entry for both long and short format page tables, the present invention reduces the amount of logic required to access both page table formats, without significantly affecting execution speed.
摘要:
A method and apparatus pre-validate regions in a virtual addressing scheme by storing both the virtual region number (VRN) bits and region identifiers (RIDs) in translation lookaside buffer (TLB) entries. By storing both the VRN bits and RIDs in TLB entries, the region registers can be bypassed when performing most TLB accesses, thereby removing region registers the critical path of the TLB look-up process and enhancing system performance. A TLB in accordance with the present invention includes entries having a valid field, a region pre-validation valid (rpV) field, a virtual region number (VRN) field, a virtual page number (VPN) field, a region identifier (RID) field, a protection and access attributes field, and a physical page number (PPN) field. In addition, a set of region registers contains the RIDs that are active at any given time. When a virtual-to-physical entry is established for a page in a region having an RID stored in a region register, the RID and VRN are stored in the appropriate fields of the TLB entry. In addition, the valid field is set and the rpV field is set to indicate that the TLB entry contains an active VRN-to-RID mapping, thereby pre-validating the region. When a physical address is translated into a virtual address, a VRN and a VPN are extracted from the virtual address and provided to the TLB. The TLB is searched to find an entry having a set valid field, a set rpV field, and VRN and VPN fields containing entries matching the VRN and VPN extracted from the virtual address. If such an entry is found, the protection and access attributes field is used to determine whether the requested access is allowed. If the requested access is allowed, the PPN from the PPN field of the TLB entry is combined with an offset from the virtual address to produce a physical address that is used to complete the memory access.
摘要:
A pulse-width modulator and a driving unit using the same produce from an input signal, two pulse-width modulated signals of different phases with their pulse widths changing in opposite directions, and then produce final modulated signals from the difference between the pulse widths of the two pulse width modulated signals of different phases, thereby increasing the precision.
摘要:
The present invention relates to a method for manufacturing a high-strength sintered silicon carbide article and more particularly, to a method for a sintered silicon carbide article having high mechanical strength by mixing a finely divided silicon carbide powder with the definite amounts of a specific carbon-containing material, a boron compound and silicon powder as densification aids, shaping and then sintering said shaped article under an inert atmosphere.