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126 条记录 (耗时 0.038 秒)

    Method and apparatus for improving performance of out of sequence load operations in a computer system
    42.
    发明授权
    Method and apparatus for improving performance of out of sequence load operations in a computer system 失效
    用于提高计算机系统中的时序加载操作的性能的方法和装置

    公开(公告)号：US5542075A

    公开(公告)日：1996-07-30

    申请号：US320111

    申请日：1994-10-07

    申请人： Mahmut K. Ebcioglu ,  Eric P. Kronstadt ,  Manoj Kumar

    发明人： Mahmut K. Ebcioglu ,  Eric P. Kronstadt ,  Manoj Kumar

    IPC分类号： G06F9/38 ,  G06F9/45 ,  G06F9/30 ,  G06F9/312 ,  G06F12/02

    CPC分类号： G06F8/445 ,  G06F9/3834

    摘要： The invention provides for improved performance of out of sequence load operations. The system has an improved compiler, with an optimizer, an improved CPU with four new instructions in its instruction set, and an address compare unit (ACU). During compilation, the improved compiler identifies load operations that can be move out of sequence ahead of associated store operations and moves those load operations out of sequence and flags them as such. The associated store operations are also flagged. During processor execution of a compiled and optimized program, the address of operands fetched by the out of sequence load operations are saved to the new associative memory. On request, the ACU compares the addresses saved to the addresses generated by the associated store operations. If a comparison results in an identity between the address of a store operation and an address of the out of sequence load operation, a recovery code is run to correct the problem, if not the system continues to execute the program in its compiled order. The system also has the ability to work in a multiprogramming or multitasking environment.

    摘要翻译： 本发明提供了异步负载操作的改进的性能。 该系统具有改进的编译器，优化器，改进的CPU，其指令集中有四条新指令，以及一个地址比较单元（ACU）。 在编译期间，改进的编译器识别可以在关联存储操作之前移出序列的加载操作，并将这些加载操作移出序列并将其标记为相同的。 关联的商店操作也被标记。 在编译和优化的程序的处理器执行期间，由顺序加载操作取出的操作数的地址被保存到新的关联存储器中。 根据要求，ACU将保存的地址与相关商店操作生成的地址进行比较。 如果比较导致存储操作的地址与序列加载操作的地址之间的身份，则运行恢复代码以纠正该问题，如果不是系统在其编译顺序中继续执行程序。 该系统还具有在多重编程或多任务环境中工作的能力。

    Parallel algorithm to set up benes switch; trading bandwidth for set up time
    43.
    发明授权
    Parallel algorithm to set up benes switch; trading bandwidth for set up time 失效
    并行算法设置benes切换; 交易带宽设置时间

    公开(公告)号：US5495476A

    公开(公告)日：1996-02-27

    申请号：US378755

    申请日：1995-01-26

    申请人： Manoj Kumar

    发明人： Manoj Kumar

    IPC分类号： H04Q3/68 ,  H04Q3/18 ,  H04Q3/32

    CPC分类号： H04Q3/68

    摘要： Benes networks are very effective in providing inter-processor communication in SIMD parallel machines, provided the communication patterns are compile-time determinable. These networks are ill suited when communication patterns are dynamically varying because of the long set up time requirements. The present invention is a method for handling dynamically varying communication patterns efficiently by operating the Benes network in a time division multiplexed manner, wherein during a given transmission period, the middle stage switches of the Benes network are configured as a portion of the middle stage switches of a Clos network configured to route all signals in a single period.

    摘要翻译： 如果通信模式是编译时可确定的，Benes网络在SIMD并行机中提供处理器间通信非常有效。 当通信模式由于设置时间长的要求而动态变化时，这些网络不合适。 本发明是一种通过以时分复用方式操作Benes网络来有效地处理动态变化的通信模式的方法，其中在给定的传输周期期间，Benes网络的中间级交换机被配置为中间级交换机的一部分 被配置为在单个周期内路由所有信号的Clos网络。

    Computer architecture for the concurrent execution of sequential programs
    44.
    发明授权
    Computer architecture for the concurrent execution of sequential programs 失效
    用于顺序执行程序的计算机体系结构

    公开(公告)号：US5197137A

    公开(公告)日：1993-03-23

    申请号：US387552

    申请日：1989-07-28

    申请人： Manoj Kumar ,  Ambuj Goyal

    发明人： Manoj Kumar ,  Ambuj Goyal

    IPC分类号： G06F9/38 ,  G06F9/44

    CPC分类号： G06F8/45

    摘要： A computer system processes mixed control, indexing and data manipulation instructions in groups of N instructions at a time. A group of instructions is applied to a set of N Dispatch units which execute the control and indexing instructions directly. The Dispatch Units convert data manipulation instructions into a more primitive data flow operations. The data flow operations are applied to a set of M Execution Units which process the operations concurrently by observing data dependency constraints. The data used by the control and indexing instructions is stored in a group of identical memory structures which are accessible by each of the Dispatch Units. Data for the data manipulation instructions is stored in a data structure which is divided among the Execution Units.

    Switching method for multistage interconnection networks with hot spot traffic
    45.
    发明授权
    Switching method for multistage interconnection networks with hot spot traffic 失效
    具有热点流量的多级互连网络的切换方法

    公开(公告)号：US4862454A

    公开(公告)日：1989-08-29

    申请号：US219960

    申请日：1988-07-15

    申请人： Daniel M. Dias ,  Manoj Kumar

    发明人： Daniel M. Dias ,  Manoj Kumar

    IPC分类号： H04J3/26 ,  H04L12/56

    CPC分类号： H04L47/10 ,  H04L49/25 ,  H04L49/254 ,  H04L49/30 ,  H04L49/3018 ,  H04L49/40

    摘要： A method of switching data packets through a multistage interconnection network (MIN), to prevent hot spot traffic from degrading uniform traffic performance. Each of the address bits in each packet determine the output link at each particular stage of the network to which the packet must be routed. A packet is accepted at an input buffer of the stage only if an acceptance test is met. This acceptance test depends not only on the availability of a buffer at the input buffer at a stage of the network, but also on how the address bits of the packet are related to address bits of other packets in the buffer, and on the stage of the network. If the acceptance test is not met, the packet is retained in the previous stage of the MIN, and is moved to the rear of a queue of packets in the buffer at that stage, or given a lower priority in the queue.

    Distributed voice-data switching on multi-stage interconnection networks
    46.
    发明授权
    Distributed voice-data switching on multi-stage interconnection networks 失效
    多级互连网络上的分布式语音数据交换

    公开(公告)号：US4679190A

    公开(公告)日：1987-07-07

    申请号：US856321

    申请日：1986-04-28

    申请人： Daniel M. Dias ,  Manoj Kumar ,  Yeong-Chang L. Lien ,  Kiyoshi Maruyama

    发明人： Daniel M. Dias ,  Manoj Kumar ,  Yeong-Chang L. Lien ,  Kiyoshi Maruyama

    IPC分类号： H04L12/56 ,  H04Q11/04 ,  H01Q11/04

    CPC分类号： H04Q11/04 ,  H04L49/254 ,  H04L49/101 ,  H04L49/205 ,  H04L49/25 ,  H04L49/40

    摘要： A method of switching synchronous and asynchronous data packets through a multi-stage interconnection network (MIN), so as to insure that packets with the highest assignable priority level will never be blocked at any stage of the network. More specifically, this invention relates to a method of switching voice and data packets over the MIN wherein each of the address bits in each packet determine the connection to be established at each particular stage in the network and wherein each packet has therein a priority level. In each time slot of a frame, the priority level of the packets stored in a particular originating adapter are compared and the packet with the highest priority level in each adapter is forwarded through the MIN and routed through the MIN as described above. Also, at each subswitch at each stage of the MIN, if two or more packets request the same subswitch output, only the packet with the higher priority is forwarded to the subswitch output. A packet will be assigned the highest priority only if a corresponding packet for a given circuit connection with second highest priority level was successfully transmitted through the MIN.

    摘要翻译： 一种通过多级互连网络（MIN）切换同步和异步数据分组的方法，以确保在可能的优先级别最高的分组不会在网络的任何阶段被阻塞。 更具体地，本发明涉及一种通过MIN切换语音和数据分组的方法，其中每个分组中的每个地址比特确定要在网络中的每个特定阶段建立的连接，并且其中每个分组具有优先级。 在帧的每个时隙中，比较存储在特定始发适配器中的分组的优先级，并且通过MIN转发每个适配器中具有最高优先级的分组，并如上所述通过MIN进行路由。 此外，在MIN的每个阶段的每个子切换中，如果两个或更多个分组请求相同的子交换机输出，则只有具有较高优先级的分组被转发到子交换机输出。 只有通过MIN成功传送了具有第2最高优先级的给定电路连接的相应数据包，才会将数据包分配给最高优先级。

    NATIVE GRAIN AMYLASES IN ENZYME COMBINATIONS FOR GRANULAR STARCH HYROLYSIS
    50.
    发明申请
    NATIVE GRAIN AMYLASES IN ENZYME COMBINATIONS FOR GRANULAR STARCH HYROLYSIS 审中-公开
    用于颗粒淀粉溶解的酶组合中的原料颗粒

    公开(公告)号：US20130011883A1

    公开(公告)日：2013-01-10

    申请号：US13553055

    申请日：2012-07-19

    申请人： Manoj Kumar

    发明人： Manoj Kumar

    IPC分类号： C12P7/14 ,  C12P7/04 ,  C12P19/14

    CPC分类号： C12P7/06 ,  C12P19/14 ,  Y02E50/17

    摘要： Described herein are starch hydrolysis processes for obtaining fermentable sugars from starch in milled plant material at temperatures below the starch gelatinization temperature and using exogenous plant alpha amylases further to the fermentation of the sugars to produce end products, such as ethanol.

    摘要翻译： 本文描述的是淀粉水解方法，用于在低于淀粉糊化温度的温度下在研磨的植物材料中从淀粉中获得可发酵糖，并且使用外源植物α-淀粉酶进一步进行糖的发酵以产生最终产物如乙醇。