System, method, and computer program product for controlling a shader to gather statistics
    42.
    发明授权
    System, method, and computer program product for controlling a shader to gather statistics 有权
    用于控制着色器收集统计信息的系统,方法和计算机程序产品

    公开(公告)号:US08264491B1

    公开(公告)日:2012-09-11

    申请号:US11733066

    申请日:2007-04-09

    申请人: Cass W. Everitt

    发明人: Cass W. Everitt

    IPC分类号: G06T1/00

    CPC分类号: G06T15/005

    摘要: A system, method, and computer program product are provided for controlling a shader to gather statistics. In use, instructions are received utilizing a programmable interface. A shader is then controlled to gather statistics based on the instructions. Such statistics are further output to memory utilizing the shader.

    摘要翻译: 提供了一种系统,方法和计算机程序产品,用于控制着色器收集统计信息。 在使用中,使用可编程接口接收指令。 然后控制着色器以根据说明收集统计信息。 使用着色器将这种统计信息进一步输出到存储器。

    METHOD AND SYSTEM FOR IMPROVING DATA COHERENCY IN A PARALLEL RENDERING SYSTEM
    43.
    发明申请
    METHOD AND SYSTEM FOR IMPROVING DATA COHERENCY IN A PARALLEL RENDERING SYSTEM 有权
    用于提高并行渲染系统中的数据相关性的方法和系统

    公开(公告)号:US20120147027A1

    公开(公告)日:2012-06-14

    申请号:US13399458

    申请日:2012-02-17

    IPC分类号: G09G5/00

    摘要: A method and system for improving data coherency in a parallel rendering system is disclosed. Specifically, one embodiment of the present invention sets forth a method for managing a plurality of independently processed texture streams in a parallel rendering system that includes the steps of maintaining a time stamp for a group of tiles of work that are associated with each of the plurality of the texture streams and are associated with a specified area in screen space, and utilizing the time stamps to counter divergences in the independent processing of the plurality of texture streams.

    摘要翻译: 公开了一种用于提高并行渲染系统中数据一致性的方法和系统。 具体地,本发明的一个实施例阐述了一种用于在并行渲染系统中管理多个独立处理的纹理流的方法,该方法包括以下步骤:维护与多个相关联的工作的一组瓦片的时间戳 的纹理流并且与屏幕空间中的指定区域相关联,并且利用时间戳来反复在多个纹理流的独立处理中的分歧。

    Using programmable constant buffers for multi-threaded processing
    44.
    发明授权
    Using programmable constant buffers for multi-threaded processing 有权
    使用可编程常量缓冲区进行多线程处理

    公开(公告)号:US08094158B1

    公开(公告)日:2012-01-10

    申请号:US11344306

    申请日:2006-01-31

    IPC分类号: G06F13/00

    摘要: Systems and methods for using multiple versions of programmable constants within a multi-threaded processor allow a programmable constant to be changed before a program using the constants has completed execution. Processing performance may be improved since programs using different values for a programmable constant may execute simultaneously. The programmable constants are stored in a constant buffer and an entry of a constant buffer table is bound to the constant buffer. When a programmable constant is changed it is copied to an entry in a page pool and address translation for the page pool is updated to correspond to the old version (copy) of the programmable constant. An advantage is that the constant buffer stores the newest version of the programmable constant.

    摘要翻译: 在多线程处理器中使用多个版本的可编程常数的系统和方法允许在使用常数的程序完成执行之前更改可编程常数。 可以提高处理性能,因为对可编程常数使用不同值的程序可以同时执行。 可编程常数存储在常量缓冲区中,常数缓冲表的条目被绑定到常量缓冲区。 当可编程常数被更改时,它被复制到页面池中的条目,并且页面池的地址转换被更新为对应于可编程常数的旧版本(复制)。 一个优点是常量缓冲存储最新版本的可编程常数。

    Method and system for improving data coherency in a parallel rendering system
    45.
    发明授权
    Method and system for improving data coherency in a parallel rendering system 有权
    用于提高并行渲染系统中数据一致性的方法和系统

    公开(公告)号:US08085272B1

    公开(公告)日:2011-12-27

    申请号:US11556657

    申请日:2006-11-03

    IPC分类号: G06F15/80

    CPC分类号: G06T15/005

    摘要: A method and system for improving data coherency in a parallel rendering system is disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of receiving a common input stream, tracking a periodic event associated with the common input stream, generating a plurality of fragment streams from the common input stream, inserting a marker based on an occurrence of the periodic event in a first fragment stream in the multiple fragment streams, and utilizing the marker to influence the processing of the first fragment stream so that a plurality of raster operation (ROP) request streams maintains substantially the same coherence as the common input stream. Each fragment stream is independently processed and corresponds to one of the ROP request streams.

    摘要翻译: 公开了一种用于提高并行渲染系统中数据一致性的方法和系统。 具体地,本发明的一个实施例阐述了一种方法,其包括以下步骤:接收公共输入流,跟踪与公共输入流相关联的周期性事件,从公共输入流生成多个片段流,插入标记 基于所述多个片段流中的第一片段流中的所述周期性事件的发生,并且利用所述标记来影响所述第一片段流的处理,使得多个光栅操作(ROP)请求流保持基本相同的一致性 公共输入流。 每个片段流被独立地处理并对应于其中一个ROP请求流。

    Methods and systems for reusing memory addresses in a graphics system
    46.
    发明授权
    Methods and systems for reusing memory addresses in a graphics system 有权
    在图形系统中重复使用存储器地址的方法和系统

    公开(公告)号:US07999820B1

    公开(公告)日:2011-08-16

    申请号:US11953812

    申请日:2007-12-10

    IPC分类号: G06F12/02 G06F12/10 G06F12/06

    摘要: Methods and systems for reusing memory addresses in a graphics system are disclosed, so that instances of address translation hardware can be reduced. One embodiment of the present invention sets forth a method, which includes mapping a footprint on a display screen to a group of contiguous physical memory locations in a memory system, determining an anchor physical memory address from a first transaction associated with the footprint, wherein the anchor physical memory address corresponds to an anchor in the group of contiguous physical memory locations, determining a second transaction that is also associated with the footprint, determining a set of least significant bits (LSBs) associated with the second transaction, and combining the anchor physical memory address with the set of LSBs associated with the second transaction to generate a second physical memory address for the second transaction, thereby avoiding a second full address translation.

    摘要翻译: 公开了用于重新使用图形系统中的存储器地址的方法和系统,从而可以减少地址转换硬件的实例。 本发明的一个实施例提出了一种方法,其包括将显示屏幕上的占位面积映射到存储器系统中的一组连续物理存储器位置,从与所述覆盖区相关联的第一事务确定锚物理存储器地址,其中, 锚物理存储器地址对应于连续物理存储器位置组中的锚点,确定也与占用空间相关联的第二事务,确定与第二事务相关联的一组最低有效位(LSB),以及组合锚物理 存储器地址与与第二事务相关联的一组LSB产生用于第二事务的第二物理存储器地址,从而避免第二次完全地址转换。

    Bandwidth compression for shader engine store operations
    47.
    发明授权
    Bandwidth compression for shader engine store operations 有权
    着色引擎存储操作的带宽压缩

    公开(公告)号:US07886116B1

    公开(公告)日:2011-02-08

    申请号:US11830778

    申请日:2007-07-30

    申请人: Cass W. Everitt

    发明人: Cass W. Everitt

    IPC分类号: G06F12/00 G06F17/00 G06K9/36

    CPC分类号: G06F9/30043 G06F2212/401

    摘要: Embodiments of the present invention set forth systems and methods for compressing thread group data written to frame buffer memory to increase overall memory performance. A compression/decompression engine within the frame buffer memory interface includes logic configured to identify situations where the threads of a thread group are writing similar scalar values to memory. Upon recognizing such a situation, the engine is configured to compress the scalar data into a form that allows all of the scalar data to be written to or read from the frame buffer memory in fewer clock cycles than would be required to transmit the data in uncompressed form to or from memory. Consequently, the disclosed systems and methods are able to effectively increase memory performance when executing thread group STORE and LOAD operations.

    摘要翻译: 本发明的实施例提出了将写入帧缓冲存储器的线程组数据压缩以增加总体存储器性能的系统和方法。 帧缓冲存储器接口内的压缩/解压缩引擎包括被配置为识别线程组的线程将相似标量值写入存储器的情况的逻辑。 在识别到这种情况之后,引擎被配置为将标量数据压缩成允许所有标量数据以比未压缩的数据传输所需的更少的时钟周期写入或从帧缓冲存储器读取的形式 形式到或来自记忆。 因此,所公开的系统和方法能够在执行线程组存储和加载操作时有效地增加存储器性能。

    Subshader mechanism for programming language
    49.
    发明授权
    Subshader mechanism for programming language 有权
    Subshader机制用于编程语言

    公开(公告)号:US07463259B1

    公开(公告)日:2008-12-09

    申请号:US10741691

    申请日:2003-12-18

    IPC分类号: G06T15/50

    CPC分类号: G06T15/005 G06T15/50

    摘要: A graphics processing subsystem is programmed with shader programs that make calls to an abstract interface. One or more subshaders implementing the functions of the abstract interface can also be defined. The binding of interfaces to functions is resolved by a language runtime module that compiles the subshaders. As shader programs are compiled, the runtime module determines whether each method call is associated with an interface function. For each interface method call, the runtime module determines the appropriate implementation of the interface to be bound to the method call. Once the appropriate implementation is identified, the interface binding is created using string substitution or indirect addressing instructions. At the time of compilation, which may be during the execution of the rendering application, the desired combinations of subshaders are specified and compiled into a combined shader program, which can then be executed by the graphics processing subsystem.

    摘要翻译: 图形处理子系统通过着色器程序进行编程,从而调用抽象接口。 还可以定义实现抽象接口功能的一个或多个子信息。 接口到函数的绑定由编译子级别的语言运行时模块来解决。 当着色器程序被编译时,运行时模块确定每个方法调用是否与接口函数相关联。 对于每个接口方法调用,运行时模块确定要绑定到方法调用的接口的适当实现。 一旦识别出适当的实现,就使用字符串替代或间接寻址指令创建接口绑定。 在编译时,可能在执行渲染应用程序期间,子目标的期望组合被指定并编译成组合的着色器程序,然后可以由图形处理子系统执行。

    Render to texture cull
    50.
    发明授权
    Render to texture cull 有权
    渲染纹理剔除

    公开(公告)号:US07382377B1

    公开(公告)日:2008-06-03

    申请号:US10871589

    申请日:2004-06-17

    IPC分类号: G09G5/00

    CPC分类号: G06T15/40 G06T15/04

    摘要: Method and apparatus for processing one or more fragment data. In one embodiment, the method includes processing one or more fragment data to generate one or more texture map addresses for one or more texels, determining relevance information that correspond to the texture map addresses, and translating the relevance information into a rendering constraint data structure.

    摘要翻译: 用于处理一个或多个片段数据的方法和装置。 在一个实施例中,该方法包括处理一个或多个片段数据以生成一个或多个纹理像素的一个或多个纹理映射地址,确定与纹理映射地址相对应的相关性信息,以及将相关性信息转换为渲染约束数据结构。