公开(公告)号：US4958222A

公开(公告)日：1990-09-18

申请号：US363759

申请日：1989-06-09

申请人： Hiroshi Takakura ,  Tetsuya Iida ,  Junkei Goto

发明人： Hiroshi Takakura ,  Tetsuya Iida ,  Junkei Goto

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L23/522 ,  H01L23/528 ,  H01L27/02 ,  H01L29/40

CPC分类号： H01L23/5286 ,  H01L23/5222 ,  H01L23/5225 ,  H01L23/5226 ,  H01L27/0203 ,  H01L2924/0002

摘要： A signal interference prevention wiring is disposed between two wirings which are arranged in parallel for transmitting a signal, and the signal interference prevention wiring is held at a constant potential.

公开(公告)号：US4908712A

公开(公告)日：1990-03-13

申请号：US320556

申请日：1989-03-08

申请人： Tadamitsu Uchiyama ,  Tetsuya Iida

发明人： Tadamitsu Uchiyama ,  Tetsuya Iida

IPC分类号： B41J2/21 ,  B41J2/205 ,  B41M1/18 ,  G03F3/08 ,  H04N1/23 ,  H04N1/46 ,  H04N1/48 ,  H04N1/52 ,  H04N1/60

CPC分类号： H04N1/6022 ,  B41M1/18

摘要： A method for reproduction of a multi-tone color image by combination of chromatic inks of cyan, magenta and yellow together with an achromatic ink of black. In the region of lower tone levels than a prescribed value, the image is formed by the complete under color removal, namely, by the sole use of the achromatic ink. In the region of higher tone levels than the prescribed value, the reproduction of the image is attained by performing the under color removal at a ratio of decrease relative to the rise of the tone levels, namely by causing the chromatic inks to overlap the achromatic ink.

摘要翻译： 通过将青色，品红色和黄色的彩色墨水与黑色的无色墨水组合在一起再现多色彩图像的方法。 在比规定值低的色调级别的区域中，通过完全的颜色除去形成图像，即通过唯一使用无色墨水来形成图像。 在比指定值高的色调级别的区域中，通过以相对于色调级别的上升的减小的比例执行色差去除，即通过使彩色墨水与无色墨水重叠来获得图像的再现 。

公开(公告)号：US4908624A

公开(公告)日：1990-03-13

申请号：US216046

申请日：1988-07-07

申请人： Junkei Goto ,  Tetsuya Iida

发明人： Junkei Goto ,  Tetsuya Iida

IPC分类号： H03M1/38 ,  H03M1/00

CPC分类号： H03M1/06 ,  H03M1/468

摘要： A successive approximation type A/D converter of the present invention has a capacitor having a predetermined capacitance value and arranged between an input terminal of a voltage comparator and a fixed potential terminal having a predetermined potential. According to the successive approximation type A/D converter of the present invention, the capacitor arranged between the input terminal of the voltage comparator and the fixed potential terminal having the predetermined potential prevents a potential at the input node of the voltage comparator from being greatly changed to exceed a power source voltage range due the influences of a local D/A converter when the sample mode is switched to the approximation mode. Therefore, the leakage of charges stored in the input side of the voltage comparator can be prevented. Accordingly, even if the amplitude of an analog input voltage is equal to the amplitude of the power source voltage, high-precision A/D conversion can still be performed.

公开(公告)号：US4845383A

公开(公告)日：1989-07-04

申请号：US480002

申请日：1983-03-29

申请人： Tetsuya Iida

发明人： Tetsuya Iida

IPC分类号： H03M1/38 ,  G01R19/00 ,  G01R19/10 ,  H03K5/08 ,  H03K5/24

CPC分类号： G01R19/0038 ,  G01R19/10 ,  H03K5/24 ,  H03K5/249

摘要： A voltage comparator circuit that is useful in A/D converters and D/A converters. The circuit comprises a comparison capacitor, a holding capacitor and input switching transistors. The holding capacitor holds the comparison voltage applied to it from the input switching transistors through the comparison capacitor. Therefore, the circuit can perform accurate voltage comparison even if the input voltages are sampled at a high sampling frequency.

摘要翻译： A / D转换器和D / A转换器有用的电压比较器电路。 电路包括比较电容器，保持电容器和输入开关晶体管。 保持电容器通过比较电容器保持从输入开关晶体管施加到其上的比较电压。 因此，即使以高采样频率对输入电压进行采样，电路也可进行精确的电压比较。

公开(公告)号：US4827260A

公开(公告)日：1989-05-02

申请号：US162264

申请日：1988-02-29

申请人： Naoki Sugawa ,  Tetsuya Iida

发明人： Naoki Sugawa ,  Tetsuya Iida

IPC分类号： H03M1/74 ,  H03M1/00 ,  H03M1/66

CPC分类号： H03M1/0604 ,  H03M1/742

摘要： A digital-to-analog converter of current segment type, having a plurality of first variable current sources and a second variable current source of the same structure as the first variable current sources. The converter further comprises a comparator. The comparator compares a voltage corresponding to the output current of the second variable current source with a reference voltage. The difference between these compared voltages is used to determine the output currents of the first variable current sources.

公开(公告)号：US4301427A

公开(公告)日：1981-11-17

申请号：US129737

申请日：1980-03-12

申请人： Yasoji Suzuki ,  Tetsuya Iida

发明人： Yasoji Suzuki ,  Tetsuya Iida

IPC分类号： H03K3/354 ,  H03K4/501

CPC分类号： H03K3/354 ,  H03K4/501

摘要： A Schmitt trigger astable multivibrator circuit includes a first inverter, a second inverter whose input terminal is connected to the output terminal of the first inverter, a third inverter which is constituted by a first P-channel transistor and a first N-channel transistor serially connected and whose input and output terminals are respectively connected to the output and input terminals of the second inverter. The Schmitt trigger astable multivibrator circuit further includes a second P-channel transistor connected between a positive power supply terminal and the first P-channel transistor, and a second N-channel transistor connected between a ground terminal and the first N-channel transistor, and an input signal supplied to the first inverter is also applied to the gates of the second P-channel and N-channel transistors. The astable multivibrator also includes a time constant circuit, activated in response to the second inverter's output, which connects to the first inverter's input.

摘要翻译： 施密特触发器非稳态多谐振荡器电路包括第一反相器，其输入端连接到第一反相器的输出端的第二反相器，由第一P沟道晶体管和第一N沟道晶体管串联连接的第三反相器 并且其输入和输出端分别连接到第二反相器的输出端和输入端。 施密特触发器非稳态多谐振荡器电路还包括连接在正电源端子和第一P沟道晶体管之间的第二P沟道晶体管，以及连接在接地端子和第一N沟道晶体管之间的第二N沟道晶体管，以及 提供给第一反相器的输入信号也被施加到第二P沟道和N沟道晶体管的栅极。 不稳定的多谐振荡器还包括响应于第二反相器输出而被激活的时间常数电路，其连接到第一反相器的输入端。

公开(公告)号：US4268761A

公开(公告)日：1981-05-19

申请号：US16565

申请日：1979-03-01

申请人： Yasoji Suzuki ,  Tetsuya Iida

发明人： Yasoji Suzuki ,  Tetsuya Iida

IPC分类号： H03K5/02 ,  H03K19/0185 ,  H03L5/00

CPC分类号： H03K19/018528 ,  H03K5/023

摘要： An input terminal of an interface circuit is connected to a first logic circuit which produces a first logic signal. The interface circuit compares the first logic signal with a reference voltage whose level is set between a high level and a low level of the first logic signal. The interface circuit converts levels of the signal compared. An output terminal of the interface circuit is connected to a second logic circuit whose signal levels are different from levels of the first logic signal and which is driven by the output signal compared and amplified.

摘要翻译： 接口电路的输入端连接到产生第一逻辑信号的第一逻辑电路。 接口电路将第一逻辑信号与其电平设置在第一逻辑信号的高电平和低电平之间的参考电压进行比较。 接口电路转换信号的电平进行比较。 接口电路的输出端子连接到第二逻辑电路，其信号电平与第一逻辑信号的电平不同，并且被比较和放大的输出信号驱动。

公开(公告)号：US4259686A

公开(公告)日：1981-03-31

申请号：US947432

申请日：1978-10-02

申请人： Yasoji Suzuki ,  Tetsuya Iida

发明人： Yasoji Suzuki ,  Tetsuya Iida

IPC分类号： H02J1/00 ,  G05F3/24 ,  H02M3/07 ,  H03K5/003 ,  H03K5/00

CPC分类号： H03K5/003 ,  H02M3/07

摘要： An inverter is controlled by first clock pulses for converting a positive power supply into second clock pulses having a first voltage level of the power supply and a second voltage level of a reference voltage. The second clock pulses are supplied to a capacitor. The source-drain path of a first impedance varying P-FET is connected between the output terminal of the capacitor and the reference voltage and is controlled so as to take a low impedance when the second clock pulses are at the first voltage level while a high impedance when the second clock pulses are at the second voltage level. The source-drain path of a second impedance varying P-FET is connected between the output terminal and a terminal for taking out a polarity-reversed voltage. The second impedance varying P-FET is supplied at the gate with the first clock pulses so as to be controlled to take a high impendance when the second clock pulses are at the first voltage level and a low impedance when the second clock pulses are at the second level.

摘要翻译： 逆变器由第一时钟脉冲控制，用于将正电源转换成具有电源的第一电压电平和参考电压的第二电压电平的第二时钟脉冲。 第二个时钟脉冲被提供给电容器。 第一阻抗变化P-FET的源极 - 漏极路径被连接在电容器的输出端子和参考电压之间，并且当第二时钟脉冲处于第一电压电平时被控制成低阻抗，而高 当第二时钟脉冲处于第二电压电平时的阻抗。 第二阻抗变化P-FET的源极 - 漏极路径连接在输出端子和用于取出极性反转电压的端子之间。 第二阻抗变化P-FET在栅极处以第一时钟脉冲提供，以便当第二时钟脉冲处于第一电压电平时被控制以产生高阻抗，而当第二时钟脉冲处于第二时钟脉冲时 二级

公开(公告)号：US08610005B2

公开(公告)日：2013-12-17

申请号：US12912912

申请日：2010-10-27

申请人： Tetsuya Iida ,  Kouji Sakakura

发明人： Tetsuya Iida ,  Kouji Sakakura

IPC分类号： H01R13/46 ,  H01R13/627 ,  H01R31/08

CPC分类号： H05K5/0039 ,  B60R16/0239 ,  H05K5/0069

摘要： A sealing cover (10) is provided for closing an opening of an equipment case that accommodates electric equipment of a car. The electric equipment includes a circuit with an operation control portion for switching a main circuit from an operating state to a shutdown state in accordance with signals inputted to an input terminal thereof. The sealing cover (10) has a cover body (11) mounted on the equipment case to close the open part. An interlocking connector (35) is provided on the cover body (11) and is connected to the input terminal when the cover body (11) is mounted on the equipment case and disconnected from the input terminal when the cover body (11) is removed from the equipment case to switch the main body circuit from the operating state to the shutdown state.

摘要翻译： 设置有用于封闭容纳汽车的电气设备的设备壳体的开口的密封盖（10）。 电气设备包括具有操作控制部分的电路，用于根据输入到其输入端的信号将主电路从操作状态切换到关闭状态。 密封盖（10）具有安装在设备壳体上以封闭打开部分的盖体（11）。 当盖主体（11）被安装在设备壳体上并且当盖体（11）被移除时与输入端子断开连接时，在盖主体（11）上设置有互锁连接器（35）并且连接到输入端子 从设备箱将主体电路从运行状态切换到关机状态。

公开(公告)号：US20110100704A1

公开(公告)日：2011-05-05

申请号：US12912912

申请日：2010-10-27

申请人： Tetsuya Iida ,  Kouji Sakakura

发明人： Tetsuya Iida ,  Kouji Sakakura

IPC分类号： H05K5/00

CPC分类号： H05K5/0039 ,  B60R16/0239 ,  H05K5/0069

摘要： A sealing cover (10) is provided for closing an opening of an equipment case that accommodates electric equipment of a car. The electric equipment includes a circuit with an operation control portion for switching a main circuit from an operating state to a shutdown state in accordance with signals inputted to an input terminal thereof. The sealing cover (10) has a cover body (11) mounted on the equipment case to close the open part. An interlocking connector (35) is provided on the cover body (11) and is connected to the input terminal when the cover body (11) is mounted on the equipment case and disconnected from the input terminal when the cover body (11) is removed from the equipment case to switch the main body circuit from the operating state to the shutdown state.

摘要翻译： 设置有用于封闭容纳汽车的电气设备的设备壳体的开口的密封盖（10）。 电气设备包括具有操作控制部分的电路，用于根据输入到其输入端的信号将主电路从操作状态切换到关闭状态。 密封盖（10）具有安装在设备壳体上以封闭打开部分的盖体（11）。 当盖主体（11）被安装在设备壳体上并且当盖体（11）被移除时与输入端子断开连接时，在盖主体（11）上设置有互锁连接器（35）并且连接到输入端子 从设备箱将主体电路从运行状态切换到关机状态。