摘要:
In a digital camera, when snapshot shooting is instructed during recording of a moving image, a shot still image is temporarily pushed aside in a memory area for use in pushing aside (7a) in a frame buffer (7). A currently shooting motion image and a still image are displayed in parallel on a display (9), so that a user can confirm a content of a snapshot. The moving image continues to be recorded even during a push-aside operation. After a moving image processing is completed, the still image is processed by an image correcting circuit (4). The frame buffer (7) comprises a plurality of frame recording areas, and is shared on the occasions of a moving image processing and a still image processing. In a normal moving image processing, these areas are utilized in a cyclic manner, and when the still image is shot, any of areas will be utilized. Thereafter, the rest of areas are utilized in the cyclic manner for the moving images. The recording function for the moving image and still image is improved at low cost, it becomes easy to take a snapshot, and the merchandise size is not increased.
摘要:
In a digital camera, when snapshot shooting is instructed during recording of a moving image, a shot still image is temporarily pushed aside in a memory area for use in pushing aside (7a) in a frame buffer (7). A currently shooting motion image and a still image are displayed in parallel on a display (9), so that a user can confirm a content of a snapshot. The moving image continues to be recorded even during a push-aside operation. After a moving image processing is completed, the still image is processed by an image correcting circuit (4). The frame buffer (7) comprises a plurality of frame recording areas, and is shared on the occasions of a moving image processing and a still image processing. In a normal moving image processing, these areas are utilized in a cyclic manner, and when the still image is shot, any of areas will be utilized. Thereafter, the rest of areas are utilized in the cyclic manner for the moving images. The recording function for the moving image and still image is improved at low cost, it becomes easy to take a snapshot, and the merchandise size is not increased.
摘要:
A decoding unit (12) decodes an image according to JPEG 2000. A simplifying unit (30) comprises an automatic transformer (32) which compares an elapsed time to a time limit at each stage of decoding the image and switches the decoding process to a simplified process if necessary. For instance, if the playback of a motion picture takes over 1/30 second, the simplified process, in which only low frequency components are decoded, is conducted by the automatic transformer (32).
摘要:
The digital broadcast receiving apparatus according to the present invention includes a tuning unit for outputting normal image data for performing a normal reproduction operation corresponding to a user selected channel, a memory unit for outputting background image data for performing a background reproduction operation when the normal reproduction operation cannot be performed, a data selector for receiving the normal image data and the background image data and outputting one of the normal image data and the background image data, and an MPEG video decode unit for decoding image data output by the data selector to generate an image signal. The tuning unit successively receives the respective channel selected in the background independently of the user selection, and stores the background image data corresponding to the respective channels in the memory unit.
摘要:
When a reverse reproduction is instructed, an MPEG video stream is once decoded and is again recoded by an MPEG video encoder so as to generate a recoded data sequence which will be overwritten on a storage area in a hard disk. An MPEG video decoder reads out this recoded data sequence in a reverse time-series manner and decodes it successively, and then converts it to a video signal so as to be outputted to a display.
摘要:
A wavelet transform is applied to an original image, so as to generate an image of a first hierarchy. Among the thus generated image of the first hierarchy, each of high-frequency sub-band components 1HL, 1LH and 1HH are immediately quantized and coded so as to be temporarily stored in a coded data storage. Another wavelet transform is applied to an LL sub-band component, among the image of the first hierarchy, so as to generate an image of a second hierarchy. Thereafter, an image of a third hierarchy is generated from an LL sub-band component in the image of the second hierarchy. During such a process, quantization and coding processings are performed in parallel with transformation processings. After all processings are completed and the coded data are prepared, coded image data complying with the JPEG2000 standard are generated by first reading out low-frequency components in sequence from the prepared coded data.
摘要:
Coded image data which are coded hierarchically are decoded successively by an inverse wavelet transformer. During a process of decoding, images of intermediate hierarchy are stored in a frame buffer. In a case where constrains are placed on memory capacity or power capacity utilizable for a decoding processing, or resolution at an outputting end is limited, an abort processor discontinues or aborts the decoding processing in the middle. Then, the abort processor extracts intermediate-hierarchy images obtained by that time, from the frame buffer, and performs thereon an image processing such as a scaling, as appropriate, so as to be used as final decoded images. Thereby, a processing cost is markedly reduced.
摘要:
Header information capture section extracts information such as the numbers of dots in horizontal and vertical directions, respectively, of the picture, a frame rate and so on from a sequence header included in an MPEG video stream. Total processing amount estimation/reproduction scheme determination section receives a channel priority determined for each display mode and an output of header information capture section to estimate a total processing amount and determine a reproduction scheme for each channel. MPEG decoder receives code inputs of channels 1 to 4 in a time-dividing manner through header information capture section to perform decoding of picture codes of each channel according to a determination signal outputted from total processing amount estimation/reproduction scheme determination section. With such a configuration, there is provided an moving picture decoding apparatus capable of performing high quality picture display in plural channels while suppressing increase in circuit scale of a decoder and in use amount of a memory.
摘要:
Coded data are inputted from a stream analyzing unit to an entropy decoding unit. A group of peripheral information registers stores peripheral information on a target pixel for estimating a context used for arithmetic decoding of the coded data. Based on the peripheral information stored in the group of peripheral registers, a context estimation unit estimates a context and delivers the estimated context to an arithmetic decoding unit. The arithmetic decoding unit decodes the coded data based on a context label, then derives a decision and supplies the decision to an inverse quantization unit. The peripheral information stored in the group of peripheral registers is updated by a decoding result of the arithmetic decoding unit in the same cycle as the decoding.
摘要:
An MPEG video decoder 1 decodes a MPEG video stream using a discrete cosine transform together with a motion compensated prediction performing backward prediction and forward prediction. A frame buffer 104a is provided with a storage area for forward-reference luminance data used for the backward prediction and a storage area for rearward-reference color-difference data used for the forward prediction. A frame buffer 104b is provided with a storage area for forward-reference color-difference data used for the backward prediction and a storage area for rearward-reference luminance data used for the forward prediction. Memory access for each of the frame buffers 104a, 104b with an input/output data bus width of 16 bit is performed in a parallel processing.