DRIVING PROTECTION CIRCUIT, OPERATING CIRCUIT AND CONTROL METHOD

    公开(公告)号:US20200176970A1

    公开(公告)日:2020-06-04

    申请号:US16701839

    申请日:2019-12-03

    IPC分类号: H02H3/20 H02H1/00

    摘要: A driving protection circuit is coupled to a load via an input/output pin. A signal generator circuit is configured to generate a driving signal. An input/output circuit transmits the driving signal to the input/output pin according to an enable signal. A counter circuit adjusts the count value when the enable signal is at a predetermined level. A detection circuit detects the voltage level of the input/output pin to generate a detection signal. When the count value is equal to a predetermined value, a control circuit determines whether the level of the detection signal is the same as the level of the driving signal. When the level of the detection signal is not the same as the level of the driving signal, the control circuit sends an error signal to turn off power to the load.

    Input/output buffer circuit with a protection circuit

    公开(公告)号:US10566781B2

    公开(公告)日:2020-02-18

    申请号:US15015144

    申请日:2016-02-04

    IPC分类号: H02H3/20

    摘要: An input/output (I/O) buffer circuit includes an I/O unit and a protection circuit. The I/O unit selectively receives and outputs signals based on an enable signal. The protection circuit generates a logic control signal to deactivate the I/O unit in a state where a voltage level of the I/O terminal is abnormal. The protection circuit includes a register. The register latches a logic signal corresponding to the voltage level of the I/O terminal in a state where the voltage level of the I/O terminal is abnormal, outputs the logic control signal based on the logic signal, and is preset to output the logic control signal based on the logic signal when a power-off state resumes to a power-on state.

    PROGRAMMABLE ARRAY LOGIC
    43.
    发明申请

    公开(公告)号:US20200044655A1

    公开(公告)日:2020-02-06

    申请号:US16427320

    申请日:2019-05-30

    发明人: Cheng-Chih Wang

    IPC分类号: H03K19/177 G11C13/00

    摘要: A programmable array logic includes a plurality of first signal lines, a plurality of second signal lines coupled to input terminals of a plurality of programmable AND gates, a plurality of first control units coupled to the first signal lines and second signal lines, a plurality of third signal lines coupled to output terminals of the programmable AND gates, a plurality of fourth signal lines coupled to input terminals of a plurality of programmable OR gates, and a plurality of second control units coupled to the third signal lines and the fourth signal lines. Each of the first control units has at least a first resistive memory for setting voltage level relationship between the first signal lines and the second signal lines. Each of second control units has a second resistive memory for setting voltage level relationship between the third signal lines and the fourth signal lines.

    Fluid flow metering device and method thereof

    公开(公告)号:US10094689B2

    公开(公告)日:2018-10-09

    申请号:US14481927

    申请日:2014-09-10

    IPC分类号: G01F1/00 G01F3/00 G01F3/30

    摘要: A fluid flow metering device and a method thereof are provided. The fluid flow metering device includes a fluid flow detector, a memory, a micro controller and a power generator. The fluid flow detector is disposed in a supply tube of a fluid flow provider. When the fluid flows in the supply tube, the power generator generates a supplying power through flow of the fluid, and provides the supplying power to the fluid flow detector, the memory and the micro controller. When the fluid flow detector detects the flow of the fluid, the fluid flow detector detects the flow of the fluid outputted from the supply tube to derive a detecting value. The micro controller receives the detecting value and writes the detecting value into the memory, or the micro controller converts the detecting value into a flow value and writes the flow value into the memory.

    Sensing device
    45.
    发明授权

    公开(公告)号:US09898123B2

    公开(公告)日:2018-02-20

    申请号:US14289667

    申请日:2014-05-29

    IPC分类号: G06F3/044 G06F3/041 H03K17/96

    摘要: A sensing device includes a comparator, a first and a second variable capacitor unit. A first comparator input of the comparator is electrically coupled to a touch pad. The first variable capacitor unit is configured to charge the first comparator input such that the first comparator input has a first potential. The second variable capacitor unit is configured to charge a second comparator input of the comparator such that the second comparator input has a second potential. The comparator is configured for comparing the first potential and the second potential to generate a comparator output signal. In a condition of the touch pad being operated, the first variable capacitor unit is adjusted according to the comparator output signal to perform potential compensation for the first comparator input, or the second variable capacitor unit is adjusted according to the comparator output signal to perform potential compensation for the second comparator input.

    Sensing device
    46.
    发明授权

    公开(公告)号:US09823772B2

    公开(公告)日:2017-11-21

    申请号:US15045227

    申请日:2016-02-16

    发明人: Cheng-Chih Wang

    摘要: A sensing device includes a comparator, a first switch, a second switch, and a controller. The comparator includes a first input end and a second input end. An end of the first switch is connected to one of a first touch electrode and a second touch electrode that are complementary. An end of the second switch is selectively connected to the second touch electrode. When the first touch electrode and the second touch electrode are touched, the controller controls the first switch to connect the first input end and the first touch electrode, controls the second switch to connect the second input end and the second touch electrode, and calculates a first touch position of the first touch electrode and the second touch electrode.

    COMMUNICATION DEVICE, COMMUNICATION SYSTEM AND OPERATION METHOD THEREOF

    公开(公告)号:US20170294912A1

    公开(公告)日:2017-10-12

    申请号:US15627459

    申请日:2017-06-20

    发明人: Cheng-Chih Wang

    IPC分类号: H03K19/00 H03K19/177

    摘要: A communication device, a communication system and an operation method thereof are provided. The communication device includes a micro-controller unit (MCU) and a field programmable gate array (FPGA). The FPGA is coupled to the MCU, and is configured to execute a first communication protocol to work with the MCU so as to communicate with another communication device in a first period, and meanwhile the FPGA is programmed with a second communication protocol by the MCU in the same first period. The FPGA is controlled by a switch pulse output from the MCU to terminate the first period, and switched from the first communication protocol to the second communication protocol, and then executes the second communication protocol to work with the MCU so as to communicate with the another communication device in a second period.

    Function programmable circuit and operation method thereof

    公开(公告)号:US09716503B2

    公开(公告)日:2017-07-25

    申请号:US15135544

    申请日:2016-04-21

    IPC分类号: H03K19/177 H03K19/00

    摘要: A function programmable circuit and an operation method thereof are provided. The function programmable circuit includes a micro-controller unit (MCU) and a field programmable gate array (FPGA). The FPGA is coupled to the MCU, and is capable of being configured to execute a first function and work with the MCU in a first period, while the FPGA is being programmed a second function by the MCU in the same first period. The FPGA is controlled by a function switch pulse output from the MCU to terminate the first period, and switched from the first function to the second function, and then executes the second function and works with the MCU in a second period.

    INTEGRATED CIRCUIT AND OPERATION METHOD THEREOF
    49.
    发明申请
    INTEGRATED CIRCUIT AND OPERATION METHOD THEREOF 有权
    集成电路及其操作方法

    公开(公告)号:US20150097607A1

    公开(公告)日:2015-04-09

    申请号:US14320663

    申请日:2014-07-01

    发明人: Cheng-Chih Wang

    IPC分类号: G06F1/30 H03K17/24

    摘要: An integrated circuit and an operation method thereof are provided. The integrated circuit includes a voltage detecting unit, a central processing unit, a memory unit and a control unit. The voltage detecting unit detects a system voltage and correspondingly outputs a voltage state signal. The central processing unit has at least one register. When the system voltage is downed to a voltage level lower than or equal to a brown-out voltage and greater than a reset low voltage, the control unit stores values of the registers into the memory unit.

    摘要翻译: 提供了一种集成电路及其操作方法。 集成电路包括电压检测单元,中央处理单元,存储单元和控制单元。 电压检测单元检测系统电压并相应地输出电压状态信号。 中央处理单元至少有一个寄存器。 当系统电压降低到低于或等于欠压电压并大于复位低电压的电压电平时,控制单元将寄存器的值存储到存储器单元中。