公开(公告)号：US20180014018A1

公开(公告)日：2018-01-11

申请号：US15654574

申请日：2017-07-19

Applicant: QUALCOMM Incorporated

Inventor： Xiang Li ,  Jianle Chen ,  Marta Karczewicz

IPC: H04N19/136 ,  H04N19/42 ,  H04N19/30 ,  H04N19/186 ,  H04N19/124 ,  H04N19/70 ,  H04N19/105

CPC classification number: H04N19/136 ,  H04N19/105 ,  H04N19/124 ,  H04N19/186 ,  H04N19/30 ,  H04N19/42 ,  H04N19/70

Abstract: Techniques are described for signaling information used to generate three-dimensional (3D) color lookup tables for color gamut scalability in multi-layer video coding. A lower layer of video data may include color data in a first color gamut and a higher layer of the video data may include color data in a second color gamut. To generate inter-layer reference pictures, a video encoder and/or video decoder performs color prediction to convert the color data of a reference picture in the first color gamut to the second color gamut. The video coder may perform color prediction using a 3D lookup table. According to the techniques, a video encoder may encode partition information and/or color values of a 3D lookup table generated for color gamut scalability. A video decoder may decode the partition information and/or color values to generate the 3D lookup table in order to perform color gamut scalability.

公开(公告)号：US09800884B2

公开(公告)日：2017-10-24

申请号：US14205006

申请日：2014-03-11

Applicant: QUALCOMM Incorporated

Inventor： Liwei Guo ,  Jianle Chen ,  Xiang Li ,  Krishnakanth Rapaka ,  Wei Pu ,  Marta Karczewicz

IPC: H04N19/597 ,  H04N19/117 ,  H04N19/136 ,  H04N19/187 ,  H04N19/42 ,  H04N19/46 ,  H04N19/132 ,  H04N19/33 ,  H04N19/59 ,  H04N19/34

CPC classification number: H04N19/439 ,  H04N19/117 ,  H04N19/132 ,  H04N19/187 ,  H04N19/33 ,  H04N19/34 ,  H04N19/46 ,  H04N19/59

Abstract: An apparatus configured to code video information comprises a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a reference layer (RL) and an enhancement layer (EL). The EL comprises an EL video unit and the RL comprises an RL video unit corresponding to the EL video unit. The processor is configured to perform upsampling and bit-depth conversion on pixel information of the RL video unit in a single combined process to determine predicted pixel information of the EL video unit, and determine the EL video unit using the predicted pixel information.

公开(公告)号：US20170272782A1

公开(公告)日：2017-09-21

申请号：US15463398

申请日：2017-03-20

Applicant: QUALCOMM Incorporated

Inventor： Xiang Li ,  Jianle Chen ,  Li Zhang ,  Xin Zhao ,  Hsiao-Chiang Chuang ,  Feng Zou ,  Marta Karczewicz

IPC: H04N19/96 ,  H04N19/583

CPC classification number: H04N19/96 ,  H04N19/103 ,  H04N19/119 ,  H04N19/124 ,  H04N19/159 ,  H04N19/176 ,  H04N19/30 ,  H04N19/45 ,  H04N19/46 ,  H04N19/50 ,  H04N19/51 ,  H04N19/583 ,  H04N19/593 ,  H04N19/61 ,  H04N19/91

Abstract: An example device for decoding video data includes a video decoder configured to decode one or more syntax elements at a region-tree level of a region-tree of a tree data structure for a coding tree block (CTB) of video data, the region-tree having one or more region-tree nodes including region-tree leaf and non-leaf nodes, each of the region-tree non-leaf nodes having at least four child region-tree nodes, decode one or more syntax elements at a prediction-tree level for each of the region-tree leaf nodes of one or more prediction trees of the tree data structure for the CTB, the prediction trees each having one or more prediction-tree leaf and non-leaf nodes, each of the prediction-tree non-leaf nodes having at least two child prediction-tree nodes, each of the prediction leaf nodes defining respective coding units (CUs), and decode video data for each of the CUs.

公开(公告)号：US20170237990A1

公开(公告)日：2017-08-17

申请号：US15585918

申请日：2017-05-03

Applicant: QUALCOMM Incorporated

Inventor： Vadim Seregin ,  Jianle Chen ,  Xiang Li ,  Krishnakanth Rapaka ,  Marta Karczewicz ,  Ying Chen

IPC: H04N19/159 ,  H04N19/463 ,  H04N19/176 ,  H04N19/33

Abstract: In one embodiment, an apparatus configured to code video data includes a processor and a memory unit. The memory unit stores video data associated with a first layer having a first spatial resolution and a second layer having a second spatial resolution. The video data associated with the first layer includes at least a first layer block and first layer prediction mode information associated with the first layer block, and the first layer block includes a plurality of sub-blocks where each sub-block is associated with respective prediction mode data of the first layer prediction mode information. The processor derives the predication mode data associated with one of the plurality of sub-blocks based at least on a selection rule, upsamples the derived prediction mode data and the first layer block, and associates the upsampled prediction mode data with each upsampled sub-block of the upsampled first layer block.

公开(公告)号：US09693060B2

公开(公告)日：2017-06-27

申请号：US14078242

申请日：2013-11-12

Applicant: QUALCOMM Incorporated

Inventor： Vadim Seregin ,  Jianle Chen ,  Marta Karczewicz ,  Liwei Guo

IPC: H04N19/30 ,  H04N19/109 ,  H04N19/176 ,  H04N19/51 ,  H04N19/20 ,  H04N19/577

CPC classification number: H04N19/109 ,  H04N19/176 ,  H04N19/20 ,  H04N19/30 ,  H04N19/51 ,  H04N19/577

Abstract: An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a base layer and an enhancement layer. The video information comprises at least one enhancement layer (EL) block and at least one co-located base layer (BL) block. The co-located BL block has motion information associated therewith. The processor is configured to, in response to determining that the size of the EL block is smaller than a threshold size, either (1) use less than all of the motion information associated with the co-located BL block to code the EL block, or (2) refrain from using any motion information associated with the co-located BL block to code the EL block. The processor may encode or decode the video information.

公开(公告)号：US20170171550A1

公开(公告)日：2017-06-15

申请号：US15425738

申请日：2017-02-06

Applicant: QUALCOMM Incorporated

Inventor： Krishnakanth Rapaka ,  Ye-Kui Wang ,  Jianle Chen ,  Marta Karczewicz

IPC: H04N19/187 ,  H04N19/70 ,  H04N19/30 ,  H04N19/172 ,  H04N19/169

CPC classification number: H04N19/187 ,  H04N19/13 ,  H04N19/172 ,  H04N19/188 ,  H04N19/30 ,  H04N19/44 ,  H04N19/70

Abstract: In one example, the disclosure is directed to techniques that include receiving a bitstream comprising at least a syntax element, a first network abstraction layer unit type, and a coded access unit comprising a plurality of pictures. The techniques further include determining a value of the syntax element which indicates whether the access unit was coded using cross-layer alignment. The techniques further include determining the first network abstraction layer unit type for a picture in the access unit and determining whether the first network abstraction layer unit type equals a value in a range of type values. The techniques further include setting a network abstraction layer unit type for all other pictures in the coded access unit to equal the value of the first network abstraction layer unit type if the first network abstraction layer unit type is equal to a value in the range of type values.

公开(公告)号：US09681145B2

公开(公告)日：2017-06-13

申请号：US14513089

申请日：2014-10-13

Applicant: QUALCOMM Incorporated

Inventor： Krishnakanth Rapaka ,  Ye-Kui Wang ,  Jianle Chen ,  Fnu Hendry

IPC: H04N19/44 ,  H04N19/597 ,  H04N19/70 ,  H04N19/30

CPC classification number: H04N19/44 ,  H04N19/30 ,  H04N19/597 ,  H04N19/70

Abstract: Systems and methods for inter-layer reference picture set derivation based on sub-layer reference prediction dependency are described herein. One aspect of the subject matter described in the disclosure provides a video encoder comprising a memory configured to store one or more direct reference layer pictures of one or more current pictures in a sequence, wherein the one or more current pictures are associated with a current layer, the current layer being associated with the one or more direct reference layers. The video encoder further comprises a processor in communication with the memory unit. The memory unit is configured to set an indication associated with a current picture to indicate whether all of the one or more direct reference layer pictures of the current picture that are not restricted for use in inter-layer prediction are included in an inter-layer reference picture set associated with the current picture.

公开(公告)号：US20170150156A1

公开(公告)日：2017-05-25

申请号：US15359572

申请日：2016-11-22

Applicant: QUALCOMM Incorporated

Inventor： Li Zhang ,  Jianle Chen ,  Wei-Jung Chien ,  Xin Zhao ,  Xiang Li ,  Marta Karczewicz

IPC: H04N19/176 ,  H04N19/587

CPC classification number: H04N19/649 ,  G06F17/147 ,  H04N19/105 ,  H04N19/119 ,  H04N19/122 ,  H04N19/124 ,  H04N19/13 ,  H04N19/132 ,  H04N19/176 ,  H04N19/186 ,  H04N19/42 ,  H04N19/573 ,  H04N19/587 ,  H04N19/59 ,  H04N19/593 ,  H04N19/597 ,  H04N19/61 ,  H04N19/625 ,  H04N19/82 ,  H04N19/91 ,  H04N19/96

Abstract: A video coder uses illumination compensation (IC) to generate a non-square predictive block of a current prediction unit (PU) of a current coding unit (CU) of a current picture of the video data. In doing so, the video coder sub-samples a first set of reference samples such that a total number of reference samples in the first sub-sampled set of reference samples is equal to 2m. Additionally, the video coder sub-samples a second set of view reference samples such that a total number of reference samples in the second sub-sampled set of reference samples is equal to 2m. The video coder determines a first IC parameter based on the first sub-sampled set of reference samples and the second sub-sampled set of reference samples. The video coder uses the first IC parameter to determine a sample of the non-square predictive block.

公开(公告)号：US09648326B2

公开(公告)日：2017-05-09

申请号：US14318193

申请日：2014-06-27

Applicant: QUALCOMM Incorporated

Inventor： Jianle Chen ,  Ying Chen ,  Ye-Kui Wang ,  Krishnakanth Rapaka ,  Fnu Hendry

IPC: H04N19/105 ,  H04N19/196 ,  H04N19/187 ,  H04N19/174 ,  H04N19/30 ,  H04N19/46 ,  H04N19/597 ,  H04N19/70

CPC classification number: H04N19/105 ,  H04N19/174 ,  H04N19/196 ,  H04N19/30 ,  H04N19/46 ,  H04N19/597 ,  H04N19/70

Abstract: A method of coding video data includes receiving one or more layers of video information. Each layer may include at least one picture. The method can include processing an indicator within at least one of a video parameter set (VPS), a sequence parameter set (SPS), or a picture parameter set (PPS) that indicates whether all direct reference layer pictures associated with the at least one of the video parameter set (VPS), the sequence parameter set (SPS), or the picture parameter set (PPS) are added to an inter-layer reference picture set. Based on the indicator, the method can further include refraining from further signaling inter-layer reference picture information in any video slice associated with the at least one of the video parameter set (VPS), the sequence parameter set (SPS), or the picture parameter set (PPS). Alternatively, based on the indicator, the method can further include adding to the inter-layer reference picture set all direct reference layer pictures for any video slice associated with the at least one of the video parameter set (VPS), the sequence parameter set (SPS), or the picture parameter set (PPS).

公开(公告)号：US09635356B2

公开(公告)日：2017-04-25

申请号：US13958262

申请日：2013-08-02

Applicant: QUALCOMM Incorporated

Inventor： Xiang Li ,  Jianle Chen ,  Marta Karczewicz

IPC: H04N19/513 ,  H04N19/159 ,  H04N19/51 ,  H04N19/597 ,  H04N19/52 ,  H04N19/30 ,  H04N19/577 ,  H04N19/46 ,  H04N19/573

CPC classification number: H04N19/51 ,  H04N19/30 ,  H04N19/46 ,  H04N19/52 ,  H04N19/573 ,  H04N19/577 ,  H04N19/597

Abstract: An apparatus for coding video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores video information of a reference layer and an enhancement layer. The processor determines a value of a current video unit of the enhancement layer based on, at least in part, explicit hypotheses and implicit hypotheses calculated from movement information from the reference layer.