Accurate, low-power power detector circuits and related methods using programmable reference circuitry

    公开(公告)号:US10164593B1

    公开(公告)日:2018-12-25

    申请号:US15697940

    申请日:2017-09-07

    Abstract: Embodiments of power detector circuits and related methods to compensate for undesired DC offsets generated within power detector circuits are disclosed. Input signals having input frequencies are received and converted to a magnitude signal, and reference signals are also generated. The magnitude signal may include a DC component proportional to a power of the input signal along with undesired DC offsets. The reference signal may include a DC component proportional to a power of at least one input reference signal along with undesired DC offsets. To compensate for errors introduced by the DC offsets, a programmable digital input signal is determined in a calibration mode and then applied to reference circuitry in a normal mode to compensate for the DC offsets. For the calibration mode, a difference between the magnitude signal and the reference signal is compared to a threshold value to generate a power detection output signal.

    Managing Spurs in a Radio Frequency Circuit
    44.
    发明申请
    Managing Spurs in a Radio Frequency Circuit 有权
    管理射频电路中的马刺

    公开(公告)号:US20160233869A1

    公开(公告)日:2016-08-11

    申请号:US14616624

    申请日:2015-02-06

    Inventor: John M. Khoury

    CPC classification number: H03L7/099 H04B1/10 H04J3/06 H04J3/0685

    Abstract: In some embodiments, an integrated circuit may include a radio frequency synthesizer configured to provide a local oscillator (LO) signal at a selected frequency related to a frequency of interest. The integrated circuit may also include a re-clocking circuit having a first input to receive a clock signal having a first frequency, a second input to receive a local timing signal related to the LO signal, and an output. The re-clocking circuit may be configured to provide a local timing output signal that is a frequency adjusted version of the clock signal based upon the local re-clocking signal. The integrated circuit further may include a digital circuit including an input to receive the local timing output signal as a digital clock signal in a receive mode.

    Abstract translation: 在一些实施例中,集成电路可以包括射频合成器,其被配置为以与感兴趣频率相关的选定频率提供本地振荡器(LO)信号。 集成电路还可以包括具有第一输入以接收具有第一频率的时钟信号的第一输入端,用于接收与该LO信号相关的本地定时信号的第二输入端和输出端的再计时电路。 重新计时电路可以被配置为基于本地重新计时信号来提供作为时钟信号的频率调整版本的本地定时输出信号。 集成电路还可以包括数字电路,其包括用于在接收模式下接收本地定时输出信号作为数字时钟信号的输入。

    Phase measurements for high accuracy distance measurements

    公开(公告)号:US12127144B2

    公开(公告)日:2024-10-22

    申请号:US18215488

    申请日:2023-06-28

    CPC classification number: H04W56/0035 H04W56/005 H04W4/023

    Abstract: In at least one embodiment, a method for measuring a distance between a first communications device including a first local oscillator and a second communications device including a second local oscillator includes unwrapping N phase values to generate N unwrapped phase values. N is an integer greater than one. Each of the N phase values indicate an instantaneous phase of a received signal. The method includes averaging the N unwrapped phase values to generate an average phase value. The method includes wrapping the average phase value to generate a final phase measurement of the first local oscillator with respect to the second local oscillator.

    Correction of frequency offset between initiator and reflector

    公开(公告)号:US11737038B2

    公开(公告)日:2023-08-22

    申请号:US17107316

    申请日:2020-11-30

    CPC classification number: H04W56/0035 H04W56/005 H04W56/0055 H04W52/0287

    Abstract: A method for communicating between a first radio frequency communications device including a first local oscillator and a second radio frequency communications device including a second local oscillator includes generating phase values based on samples of a received signal. Each of the phase values indicates an instantaneous phase of the received signal. The method includes unwrapping the phase values to generate unwrapped phase values. The method includes generating frequency offset estimates based on the unwrapped phase values. The method includes generating an average frequency offset estimate based on the unwrapped phase values. The method includes wrapping the average frequency offset estimate to generate a residual frequency offset estimate. The method includes adjusting the first local oscillator based on the residual frequency offset estimate, thereby reducing a frequency offset between the first local oscillator and the second local oscillator.

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