Multimedia play apparatus and method
    41.
    发明授权
    Multimedia play apparatus and method 有权
    多媒体播放装置及方法

    公开(公告)号:US08516053B2

    公开(公告)日:2013-08-20

    申请号:US12832586

    申请日:2010-07-08

    IPC分类号: G06F15/16

    摘要: Provided are a multimedia play apparatus and method. The multimedia play apparatus and method enable synchronization between an audio and a video through existing multimedia play time information, and even in a multimedia service that simultaneously provides multimedia and a message, the multimedia play apparatus and method enable synchronization between multimedia and a message that occurs by terminal characteristics between different environments and different users on the basis of existing multimedia play time information and multimedia meaning information. Moreover, by performing synchronization between multimedia and a message on the basis of the multimedia meaning information, the multimedia play apparatus and method can prevent the damage of a multimedia service that provides multimedia and a message together because of a spoiler corresponding to a malicious message.

    摘要翻译: 提供了一种多媒体播放装置和方法。 多媒体播放装置和方法通过现有的多媒体播放时间信息实现音频和视频之间的同步,即使在同时提供多媒体和消息的多媒体服务中,多媒体播放装置和方法也可以实现多媒体与发生的消息之间的同步 根据现有多媒体播放时间信息和多媒体含义信息的不同环境和不同用户之间的终端特性。 此外,通过基于多媒体含义信息进行多媒体和消息之间的同步,多媒体播放装置和方法可以防止由于与恶意消息对应的扰流器而将多媒体和消息一起提供的多媒体服务的损坏。

    POWER COMBINER, POWER AMPLIFYING MODULE HAVING THE SAME, AND SIGNAL TRANSCEIVING MODULE
    42.
    发明申请
    POWER COMBINER, POWER AMPLIFYING MODULE HAVING THE SAME, AND SIGNAL TRANSCEIVING MODULE 有权
    动力组合机,功率放大模块及信号收发模块

    公开(公告)号:US20120249262A1

    公开(公告)日:2012-10-04

    申请号:US13220229

    申请日:2011-08-29

    IPC分类号: H03H7/46 H04B1/38 H03F3/68

    摘要: There are provided a power combiner implemented by a printed circuit board, a power amplifying module having the same, and a signal transceiving module. The power combiner includes: a primary wiring unit formed on one surface of a printed circuit board, receiving a plurality of balance signals having positive balance signals and negative balance signals, and including a plurality of positive primary wirings and a plurality of negative primary wirings, wherein the plurality of positive primary wirings are spaced apart from each other by a predetermined interval, the plurality of negative primary wirings are spaced apart from each other by a predetermined interval, one ends of the plurality of positive primary wirings are connected in common to thereby receive the plurality of positive balance signals, one ends of the plurality of negative primary wirings are connected in common to thereby receive the plurality of negative balance signals, and the other ends of the plurality of positive primary wirings and the other ends of the plurality of negative primary wirings are connected to each other to thereby form a loop; and a secondary wiring unit formed on the other surface of the printed circuit board, and including a secondary wiring combining powers of the plurality of balance signals from the primary wirings forming the loop to thereby output a single end signal.

    摘要翻译: 提供了由印刷电路板实现的功率组合器,具有该功率组合器的功率放大模块和信号收发模块。 功率组合器包括:形成在印刷电路板的一个表面上的主要布线单元,接收具有正平衡信号和负平衡信号的多个平衡信号,并且包括多个正的主布线和多个负的主布线, 其中所述多个正的主要布线彼此隔开预定的间隔,所述多个负的主布线彼此隔开预定的间隔,所述多个正的主布线的一端共同连接,从而 接收多个正平衡信号,多个负的主要布线的一端共同连接,从而接收多个负平衡信号,并且多个正的主布线的另一端和多个正平衡信号的另一端 负的主布线彼此连接,从而形成环路; 以及形成在印刷电路板的另一个表面上的辅助布线单元,并且包括从形成环路的主布线组合多个平衡信号的功率从而输出单端信号的次级布线。

    System and method for implementing an oscillator
    43.
    发明授权
    System and method for implementing an oscillator 有权
    用于实现振荡器的系统和方法

    公开(公告)号:US08120436B2

    公开(公告)日:2012-02-21

    申请号:US12433336

    申请日:2009-04-30

    IPC分类号: H03B5/24

    CPC分类号: H03B5/24

    摘要: In one embodiment, a system for generating an oscillating signal includes a transconductance amplifier comprising a single-ended output and a differential input. The system also includes only one feedback loop coupled to the transconductance amplifier. The feedback loop includes a low pass filter configured to receive the output of the transconductance amplifier. Also, the feedback loop includes a high pass filter configured to receive the output of the first low pass filter and output a signal to only one terminal of the differential input of the transconductance amplifier.

    摘要翻译: 在一个实施例中,用于产生振荡信号的系统包括跨导放大器,其包括单端输出和差分输入。 该系统还仅包括耦合到跨导放大器的一个反馈环路。 反馈回路包括配置成接收跨导放大器的输出的低通滤波器。 此外,反馈回路包括高通滤波器,其被配置为接收第一低通滤波器的输出并将信号输出到跨导放大器的差分输入的仅一个端子。

    Flash memory device having resistivity measurement pattern and method of forming the same
    44.
    发明授权
    Flash memory device having resistivity measurement pattern and method of forming the same 有权
    具有电阻率测量图案的闪存器件及其形成方法

    公开(公告)号:US07829934B2

    公开(公告)日:2010-11-09

    申请号:US12172321

    申请日:2008-07-14

    IPC分类号: H01L29/66

    摘要: A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is buried to form a resistivity measurement floating gate. This allows the resistivity of the floating gate to be measured even in the SAFG scheme. Contacts for resistivity measurement are directly connected to the resistivity measurement floating gate. Therefore, variation in resistivity measurement values, which is incurred by the parasitic interface, can be reduced.

    摘要翻译: 闪速存储器件具有电阻率测量图案及其形成方法。 在自对准浮动门(SAFG)方案中的隔离膜中形成沟槽。 埋入沟槽以形成电阻率测量浮栅。 这允许甚至在SAFG方案中测量浮动栅极的电阻率。 用于电阻率测量的触点直接连接到电阻率测量浮栅。 因此,可以减少由寄生接口引起的电阻率测量值的变化。

    System And Method For Implementing An Oscillator
    45.
    发明申请
    System And Method For Implementing An Oscillator 有权
    用于实现振荡器的系统和方法

    公开(公告)号:US20100231311A1

    公开(公告)日:2010-09-16

    申请号:US12433336

    申请日:2009-04-30

    IPC分类号: H03B5/24

    CPC分类号: H03B5/24

    摘要: In one embodiment, a system for generating an oscillating signal includes a transconductance amplifier comprising a single-ended output and a differential input. The system also includes only one feedback loop coupled to the transconductance amplifier. The feedback loop includes a low pass filter configured to receive the output of the transconductance amplifier. Also, the feedback loop includes a high pass filter configured to receive the output of the first low pass filter and output a signal to only one terminal of the differential input of the transconductance amplifier.

    摘要翻译: 在一个实施例中,用于产生振荡信号的系统包括跨导放大器,其包括单端输出和差分输入。 该系统还仅包括耦合到跨导放大器的一个反馈环路。 反馈回路包括配置成接收跨导放大器的输出的低通滤波器。 此外,反馈回路包括高通滤波器,其被配置为接收第一低通滤波器的输出并将信号输出到跨导放大器的差分输入的仅一个端子。

    Vibration actuator
    49.
    发明授权
    Vibration actuator 失效
    振动执行器

    公开(公告)号:US07606386B2

    公开(公告)日:2009-10-20

    申请号:US11105502

    申请日:2005-04-14

    IPC分类号: H04R1/00

    CPC分类号: B06B1/045

    摘要: A vibration actuator excites a mass member by interaction between an electric field of a vibration coil provided in an inner space of a case and a magnetic field of a magnetic field unit disposed corresponding to the vibration coil. The vibration actuator has an elastic wire having a wire body fixed to the outer surface of the mass member and elastic ends fixed to the inner surface of the case. The elastic wire is connected between the case and the mass member for elastically supporting mass member.

    摘要翻译: 振动执行器通过设置在壳体的内部空间中的振动线圈的电场与对应于振动线圈设置的磁场单元的磁场之间的相互作用来激励质量构件。 振动致动器具有弹性线,其具有固定到质量构件的外表面的线体,并且弹性端固定到壳体的内表面。 弹性线连接在壳体和质量构件之间,用于弹性支撑质量构件。

    Flash memory device having resistivity measurement pattern and method of forming the same
    50.
    发明授权
    Flash memory device having resistivity measurement pattern and method of forming the same 有权
    具有电阻率测量图案的闪存器件及其形成方法

    公开(公告)号:US07439131B2

    公开(公告)日:2008-10-21

    申请号:US11164677

    申请日:2005-12-01

    IPC分类号: H01L21/336

    摘要: A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is buried to form a resistivity measurement floating gate. This allows the resistivity of the floating gate to be measured even in the SAFG scheme. Contacts for resistivity measurement are directly connected to the resistivity measurement floating gate. Therefore, variation in resistivity measurement values, which is incurred by the parasitic interface, can be reduced.

    摘要翻译: 闪速存储器件具有电阻率测量图案及其形成方法。 在自对准浮动门(SAFG)方案中的隔离膜中形成沟槽。 埋入沟槽以形成电阻率测量浮栅。 这允许甚至在SAFG方案中测量浮动栅极的电阻率。 用于电阻率测量的触点直接连接到电阻率测量浮栅。 因此,可以减少由寄生接口引起的电阻率测量值的变化。