公开(公告)号：US20210011643A1

公开(公告)日：2021-01-14

申请号：US17030392

申请日：2020-09-24

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang ,  Chun-Chieh Kuo ,  Ching-Hui Lin ,  Yang-Chih Shen

IPC: G06F3/06 ,  G06F12/02 ,  G11C11/56

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

公开(公告)号：US20170308318A1

公开(公告)日：2017-10-26

申请号：US15643501

申请日：2017-07-07

Applicant: Silicon Motion Inc.

Inventor： Tsung-Chieh Yang ,  Chun-Chieh Kuo ,  Ching-Hui Lin ,  Yang-Chih Shen

IPC: G06F3/06 ,  G06F12/02 ,  G11C11/56

CPC classification number: G06F3/0634 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7206 ,  G11C11/5628 ,  G11C11/5642 ,  Y02D10/13

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

公开(公告)号：US09627047B2

公开(公告)日：2017-04-18

申请号：US14972103

申请日：2015-12-17

Applicant: Silicon Motion Inc.

Inventor： Ching-Hui Lin ,  Tsung-Chieh Yang

IPC: G11C16/04 ,  G11C11/56 ,  G11C16/10

CPC classification number: G11C11/5635 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10

Abstract: A method for writing data into a flash memory unit includes: when writing data into the flash memory unit for the n-th time, determining a data polarity of an n-th data bit to be written into the flash memory unit; selectively injecting an n-th electrical charge amount into a floating gate of the flash memory unit according to the data polarity of the n-th data bit; when writing data into the flash memory unit for the (n+1)-th time, determining the data polarity of an (n+1)-th data bit to be written into the flash memory unit; and selectively injecting an (n+1)-th electrical charge amount into the floating gate of the flash memory unit according to the data polarity of the (n+1)-th data bit. The (n+1)-th electrical charge amount is not equal to the n-th electrical charge amount, and n is a positive integer not less than 1.

公开(公告)号：US20160180927A1

公开(公告)日：2016-06-23

申请号：US14972103

申请日：2015-12-17

Applicant: Silicon Motion Inc.

Inventor： Ching-Hui Lin ,  Tsung-Chieh Yang

IPC: G11C11/56

CPC classification number: G11C11/5635 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10

Abstract: A method for writing data into a flash memory unit includes: when writing data into the flash memory unit for the n-th time, determining a data polarity of an n-th data bit to be written into the flash memory unit; selectively injecting an n-th electrical charge amount into a floating gate of the flash memory unit according to the data polarity of the n-th data bit; when writing data into the flash memory unit for the (n+1)-th time, determining the data polarity of an (n+1)-th data bit to be written into the flash memory unit; and selectively injecting an (n+1)-th electrical charge amount into the floating gate of the flash memory unit according to the data polarity of the (n+1)-th data bit. The (n+1)-th electrical charge amount is not equal to the n-th electrical charge amount, and n is a positive integer not less than 1.

Abstract translation: 一种将数据写入闪存单元的方法包括：当将数据写入闪存单元第n次时，确定要写入闪存单元的第n个数据位的数据极性; 根据第n个数据位的数据极性，选择性地将第n个电荷量注入闪速存储器单元的浮置栅极; 当在第（n + 1）次时间内将数据写入闪存单元时，确定要写入闪存单元的第（n + 1）个数据位的数据极性; 以及根据第（n + 1）个数据位的数据极性选择性地将第（n + 1）个电荷量注入到闪速存储器单元的浮置栅极。 第（n + 1）个电荷量不等于第n个电荷量，n是不小于1的正整数。

公开(公告)号：US20130107625A1

公开(公告)日：2013-05-02

申请号：US13658086

申请日：2012-10-23

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang ,  Ching-Hui Lin ,  Yang-Chih Shen ,  Chun-Chieh Kuo

IPC: G11C16/06 ,  G11C16/04

CPC classification number: G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C2211/5641

Abstract: The invention provides a flash memory apparatus. In one embodiment, the flash memory apparatus comprises a flash memory and a flash memory controller. The flash memory comprises a write circuit and a memory cell array comprising a plurality of memory cells, wherein the write circuit is coupled to the memory cell array to write data in the memory cells. The flash memory controller is coupled to the write circuit, obtains a total capacity and a used data amount of the flash memory, and directs the write circuit to perform data writing in a one-bit mode when a ratio of the user data amount to the total capacity is less than a first predetermined value.

Abstract translation: 本发明提供一种闪存装置。 在一个实施例中，闪存装置包括闪速存储器和闪存控制器。 闪速存储器包括写电路和包括多个存储单元的存储单元阵列，其中写电路耦合到存储单元阵列以将数据写入存储单元。 闪速存储器控制器耦合到写入电路，获得闪存的总容量和使用的数据量，并且当用户数据量与存储器的比率相对应时，引导写入电路以一位模式执行数据写入 总容量小于第一预定值。