Fast floating point compare with slower backup for corner cases
    41.
    发明授权
    Fast floating point compare with slower backup for corner cases 有权
    快速浮点与较慢的备份角落比较

    公开(公告)号:US08407275B2

    公开(公告)日:2013-03-26

    申请号:US12255968

    申请日:2008-10-22

    IPC分类号: G06F7/02

    CPC分类号: G06F9/30021 G06F9/30025

    摘要: A floating point processor unit executes a floating point compare instruction with two operands of the same or different precision by comparing the two operands in integer format, which speeds up the execution of the floating point compare instruction significantly. The floating point processor now executes the floating point compare instruction at least twice as fast or faster (e.g., two clock cycles instead of five clock cycles in the prior art) for nearly most operand cases (e.g., 99% of all cases). Only the rare corner cases require additional operations on one of the operands and thus require additional cycles of execution time because the integer compare operation will not work for these corner cases. This is due to the fact that one operand is a single precision subnormal number in an unnormalized representation (i.e., has two representations) and the other operand is in the SP subnormal range such that the integer compare operation will fail.

    摘要翻译: 浮点处理器单元通过比较整数格式的两个操作数来执行具有相同或不同精度的两个操作数的浮点比较指令,这显着地加快了浮点比较指令的执行。 浮点处理器现在对于几乎大多数操作数情况(例如,所有情况的99%),至少执行两倍快或更快(例如,现有技术中的两个时钟周期而不是五个时钟周期)的浮点比较指令。 只有罕见的角落情况需要在其中一个操作数上进行额外的操作,因此需要额外的执行周期,因为整数比较操作将不适用于这些角色。 这是由于一个操作数是非正规化表示中的单精度子正规数(即,具有两个表示),另一个操作数处于SP子正常范围,使得整数比较操作将失败。

    System and method for a floating point unit with feedback prior to normalization and rounding
    43.
    发明授权
    System and method for a floating point unit with feedback prior to normalization and rounding 失效
    在归一化和舍入之前具有反馈的浮点单元的系统和方法

    公开(公告)号:US07730117B2

    公开(公告)日:2010-06-01

    申请号:US11054110

    申请日:2005-02-09

    IPC分类号: G06F7/38 G06F15/00

    摘要: A system for performing floating point arithmetic operations including an input register adapted for receiving an operand. The system also includes a mechanism for performing a shift or masking operation in response to determining that the operand is in an un-normalized format. The system also includes instructions for performing single precision incrementing of the operand in response to determining that the operand is single precision, that the operand requires the incrementing based on the results of a previous operation and that the previous operation did not perform the incrementing. The operand was created in the previous operation. The system further includes instructions for performing double precision incrementing of the operand in response to determining that the operand is double precision, that the operand requires the incrementing based on the results of the previous operation and that the previous operation did not perform the incrementing.

    摘要翻译: 一种用于执行浮点算术运算的系统,包括适于接收操作数的输入寄存器。 该系统还包括响应于确定操作数处于非归一化格式而执行移位或掩蔽操作的机制。 该系统还包括用于响应于确定操作数是单一精度来执行操作数的单精度递增的指令,操作数需要基于先前操作的结果而增加,并且先前的操作未执行递增。 操作数是在以前的操作中创建的。 该系统还包括响应于确定操作数是双精度来执行操作数的双精度递增的指令,操作数需要基于先前操作的结果而增加,并且先前的操作不执行递增。

    System and method for performing floating point store folding
    44.
    发明授权
    System and method for performing floating point store folding 失效
    执行浮点存储折叠的系统和方法

    公开(公告)号:US07188233B2

    公开(公告)日:2007-03-06

    申请号:US11054686

    申请日:2005-02-09

    IPC分类号: G06F9/312

    摘要: A system for performing floating point arithmetic operations including a plurality of stages making up a pipeline, the stages including a first stage and a last stage. The system also includes a register file adapted for receiving a store instruction for input to the pipeline, where the data associated with the store instruction is dependent on a previous operation still in the pipeline. The system further includes a store register adapted for outputting the data associated with the store instruction to memory and a control unit having instructions. The instructions are directed to inputting the store instruction into the pipeline and to providing a path for forwarding the data associated with the store instruction from the last stage in the pipeline to the store register for use by the store instruction if the previous operation immediately precedes the store operation in the pipeline and if there is a data type match between the store instruction and the previous operation. In addition, the instructions are directed to inputting the store instruction into the pipeline and to providing a path for forwarding the data associated with the store instruction from the first stage in the pipeline to the store register for use by the store instruction if the previous operation precedes the store operation by one or more stage in the pipeline and if there is a data type match between the store instruction and the previous operation.

    摘要翻译: 一种用于执行浮点算术运算的系统,包括构成流水线的多个级,所述级包括第一级和最后级。 该系统还包括适于接收用于输入到流水线的存储指令的寄存器文件,其中与存储指令相关联的数据依赖于仍在流水线中的先前操作。 该系统还包括适于将与存储指令相关联的数据输出到存储器的存储寄存器和具有指令的控制单元。 这些指令旨在将存储指令输入到流水线中,并且提供一个路径,用于将与流水线中的最后一级相关联的存储指令的数据转发到存储寄存器以供存储指令使用,如果先前的操作紧接在 存储操作在流水线中,并且存储指令与先前操作之间存在数据类型匹配。 此外,该指令旨在将存储指令输入到流水线中,并且提供用于将与流水线中的第一级相关联的存储指令的数据转发到存储寄存器以供存储指令使用的路径,如果先前的操作 在存储操作之前在流水线中的一个或多个阶段,以及存储指令和先前操作之间是否存在数据类型匹配。

    System and method for processing limited out-of-order execution of floating point loads
    45.
    发明申请
    System and method for processing limited out-of-order execution of floating point loads 审中-公开
    用于处理浮点负载有限次序执行的系统和方法

    公开(公告)号:US20060179286A1

    公开(公告)日:2006-08-10

    申请号:US11054201

    申请日:2005-02-09

    IPC分类号: G06F9/44

    CPC分类号: G06F9/3867 G06F9/3838

    摘要: A system for performing limited out-of order execution of floating point loads. The system includes a plurality of stages making up a pipeline, the stages including an early stage. The system also includes a mechanism for inputting an arithmetic instruction into the pipeline, the arithmetic instruction including a result address. The mechanism also determines if the arithmetic instruction causes a write after write (WAW) condition to occur before writing a result of the arithmetic instruction to the result address. The determining includes comparing the result address to a load address associated with a load instruction subsequent to the arithmetic instruction in the pipeline. The load data associated with the load instruction was written to the load address in the early stage of the pipeline. A WAW condition occurs if the result address is equal to the load address. Writing a result of the arithmetic instruction is suppressed in response to the WAW condition occurring.

    摘要翻译: 用于执行浮点负载有限次序执行的系统。 该系统包括构成管道的多个阶段,这些阶段包括早期阶段。 该系统还包括用于将算术指令输入流水线的机构,算术指令包括结果地址。 该机制还确定在将算术指令的结果写入结果地址之前,算术指令是否在写入(WAW)条件之后发生写入。 确定包括将结果地址与在流水线中的算术指令之后的加载指令相关联的加载地址进行比较。 与加载指令相关联的加载数据在管道的早期阶段被写入加载地址。 如果结果地址等于加载地址,则会发生WAW条件。 响应于发生的WAW状态,写入算术指令的结果被抑制。

    System and method for a floating point unit with feedback prior to normalization and rounding
    46.
    发明申请
    System and method for a floating point unit with feedback prior to normalization and rounding 失效
    在归一化和舍入之前具有反馈的浮点单元的系统和方法

    公开(公告)号:US20060179097A1

    公开(公告)日:2006-08-10

    申请号:US11054110

    申请日:2005-02-09

    IPC分类号: G06F7/38

    摘要: A system for performing floating point arithmetic operations including an input register adapted for receiving an operand. The system also includes a mechanism for performing a shift or masking operation in response to determining that the operand is in an un-normalized format. The system also includes instructions for performing single precision incrementing of the operand in response to determining that the operand is single precision, that the operand requires the incrementing based on the results of a previous operation and that the previous operation did not perform the incrementing. The operand was created in the previous operation. The system further includes instructions for performing double precision incrementing of the operand in response to determining that the operand is double precision, that the operand requires the incrementing based on the results of the previous operation and that the previous operation did not perform the incrementing.

    摘要翻译: 一种用于执行浮点算术运算的系统,包括适于接收操作数的输入寄存器。 该系统还包括响应于确定操作数处于非归一化格式而执行移位或掩蔽操作的机制。 该系统还包括用于响应于确定操作数是单一精度来执行操作数的单精度递增的指令,操作数需要基于先前操作的结果而增加,并且先前的操作未执行递增。 操作数是在以前的操作中创建的。 该系统还包括响应于确定操作数是双精度来执行操作数的双精度递增的指令,操作数需要基于先前操作的结果而增加,并且先前的操作不执行递增。

    System and method for a fused multiply-add dataflow with early feedback prior to rounding
    47.
    发明申请
    System and method for a fused multiply-add dataflow with early feedback prior to rounding 审中-公开
    在舍入前采用早期反馈的融合乘法加法数据流的系统和方法

    公开(公告)号:US20060179096A1

    公开(公告)日:2006-08-10

    申请号:US11055232

    申请日:2005-02-10

    IPC分类号: G06F7/38

    摘要: A system for performing floating point arithmetic operations including an input register adapted for receiving an operand. The system also includes computer instructions for performing single precision incrementing of the operand in response to determining that the operand is single precision, that the operand requires the incrementing based on the results of a previous operation and that the previous operation did not perform the incrementing. The operand was created in the previous operation. The system further includes instructions for performing double precision incrementing of the operand in response to determining that the operand is double precision, that the operand requires the incrementing based on the results of the previous operation and that the previous operation did not perform the incrementing.

    摘要翻译: 一种用于执行浮点算术运算的系统,包括适于接收操作数的输入寄存器。 该系统还包括用于响应于确定操作数是单精度来执行操作数的单精度递增的计算机指令,操作数基于先前操作的结果需要增加,并且先前的操作未执行递增。 操作数是在以前的操作中创建的。 该系统还包括响应于确定操作数是双精度来执行操作数的双精度递增的指令,操作数需要基于先前操作的结果而增加,并且先前的操作不执行递增。

    Catonic urea/formaldehyde resins, their preparation and their use in the
paper industry
    48.
    发明授权
    Catonic urea/formaldehyde resins, their preparation and their use in the paper industry 失效
    阳离子脲/甲醛树脂,其制备及其在造纸工业中的应用。

    公开(公告)号:US5554718A

    公开(公告)日:1996-09-10

    申请号:US775928

    申请日:1991-11-06

    摘要: Cationic urea/formaldehyde resins are obtainable by condensing urea and formaldehyde in a molar ratio of from 1:1.5 to 1:3 in the presence of polymers which contain not less than 1 mol % of polymerized vinylamine units and have Fikentscher K values of from 5 to 300, in an amount of from 5 to 50 g per mole of urea in the end product, where the mixture is first a) precondensed at a pH of from 8 to 14, then acidified and b) condensed at a pH of from 1 to 5 until gel formation begins, c) then from 0.3 to 1.5 moles of formaldehyde are added per mole of urea used, d) post-condensation is carried out and e) the resin solution is subsequently neutralized. The resins thus obtained are used in papermaking as assistants for increasing the dry and wet strength of paper and result in less dulling of the whiteness of the paper.

    摘要翻译: PCT No.PCT / EP90 / 01399 Sec。 371日期1991年11月6日 102(e)1991年11月6日,PCT提交1990年8月22日PCT公布。 出版物WO91 / 02762 日期1991年3月7日阳离子脲/甲醛树脂可通过在含有不少于1摩尔%的聚合乙烯胺单元的聚合物存在下将脲和甲醛以1:1.5至1:3的摩尔比缩合而得到,并具有Fikentscher K值为5至300,最终产物中每摩尔尿素为5至50g,其中混合物首先a)在8至14的pH下预缩合,然后酸化并b)在 pH为1至5,直到凝胶形成开始,c)然后每摩尔使用的尿素加入0.3至1.5摩尔的甲醛,d)进行后冷凝,e)随后中和树脂溶液。 由此获得的树脂用于造纸中作为助剂以增加纸张的干湿强度,并且导致纸的白度较少的钝化。