公开(公告)号：US10141978B2

公开(公告)日：2018-11-27

申请号：US15796442

申请日：2017-10-27

Applicant: Texas Instruments Incorporated

Inventor： Badri N Varadarajan ,  Anand Dabak ,  II Han Kim

IPC: H04B3/54 ,  H04L29/08 ,  H04L1/00 ,  H04L29/06

Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.

公开(公告)号：US09819392B2

公开(公告)日：2017-11-14

申请号：US15476587

申请日：2017-03-31

Applicant: Texas Instruments Incorporated

Inventor： Badri N Varadarajan ,  Anand Dabak ,  Il Han Kim

IPC: H04B3/54 ,  H04L29/08 ,  H04L1/00

CPC classification number: H04B3/54 ,  H04L1/0041 ,  H04L1/0071 ,  H04L69/22 ,  H04L69/323

Abstract: In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line.

公开(公告)号：US09667318B2

公开(公告)日：2017-05-30

申请号：US14798576

申请日：2015-07-14

Applicant: Texas Instruments Incorporated

Inventor： Badri N. Varadarajan ,  Anand Dabak ,  Il Han Kim

IPC: H04L29/06 ,  H04B3/54

CPC classification number: H04B3/54 ,  H04L1/0041 ,  H04L1/0071 ,  H04L69/22 ,  H04L69/323

Abstract: Embodiments of the invention provide a device and a frame structure for powerline communications. The header may comprise two parts that are separately encoded. A common header segment is encoded alone, and an embedded header segment is encoded with payload data.

公开(公告)号：US09641219B2

公开(公告)日：2017-05-02

申请号：US14886961

申请日：2015-10-19

Applicant: Texas Instruments Incorporated

Inventor： Tarkesh Pande ,  Anand Dabak ,  Kumaran Vijayasankar ,  Ramanuja Vedantham ,  Il Han Kim

IPC: H04L27/18 ,  H04L27/32 ,  H04B3/54 ,  H04L27/04 ,  H04L5/00 ,  H04L27/26

CPC classification number: H04B3/54 ,  H04B2203/5416 ,  H04L5/0094 ,  H04L27/04 ,  H04L27/18 ,  H04L27/2602 ,  H04L27/32

Abstract: Systems and methods for routing protocols for power line communications (PLC) are described. In some embodiments, a method performed by a PLC device, such as a PLC meter, may include selecting one or more transmit sub-bands on which to transmit frames, where the transmit sub-bands comprise groups of carrier frequencies. The PLC device then generates a frame comprising a tone map that indicates which transmit sub-bands are used to carry data for the frame. The tone map using two bits per transmit sub-band to indicate a status of each transmit sub-band. The PLC device then transmits the frame on the selected transmit sub-bands. A resolution bit and a mode bit may be used to provide additional information about the transmit sub-bands, such as an amount of power adjustment that has been applied to carrier frequencies and whether dummy bits are transmitted on unused carrier frequencies.

公开(公告)号：US20160239063A1

公开(公告)日：2016-08-18

申请号：US15063001

申请日：2016-03-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Deric W. Waters ,  Srinath Hosur ,  Anand Dabak

IPC: G06F1/26

CPC classification number: G06F1/266 ,  G06F1/263 ,  G06F1/32

Abstract: A VBUS conductor is checked to determine whether a voltage on the VBUS conductor is greater than a vSafe0V voltage within a detect time interval. A device policy manager applies a vSafeDB voltage to the VBUS conductor when the voltage on the VBUS conductor is greater than the vSafe0V voltage. The policy engine waits for a bit stream to be detected within a timer interval. When the bit stream is not detected within the timer interval, the device policy manager is instructed to apply the vSafe0V voltage to the VBUS conductor. The device policy manager applies a vSafe5V voltage to the VBUS conductor when the bit stream is detected, and the policy engine waits for the bit stream to stop within a device ready timer interval. When the bit stream has stopped within the device ready timer interval, the policy engine sends capabilities as a source port.

Abstract translation: 检查VBUS导体以确定VBUS导体中的电压是否大于检测时间间隔内的vSafe0V电压。 当VBUS导体上的电压大于vSafe0V电压时，器件策略管理器将vSafeDB电压施加到VBUS导体。 策略引擎等待在定时器间隔内检测到位流。 当在定时器间隔内未检测到比特流时，指示设备策略管理器将vSafe0V电压应用于VBUS导体。 当检测到位流时，设备策略管理器将vSafe5V电压施加到VBUS导体，并且策略引擎等待位流在设备就绪定时器间隔内停止。 当位流在设备就绪定时器间隔内停止时，策略引擎将功能作为源端口发送。

公开(公告)号：US09274201B2

公开(公告)日：2016-03-01

申请号：US14317730

申请日：2014-06-27

Applicant: Texas Instruments Incorporated

Inventor： Kaichien Tsai ,  Minghua Fu ,  Anand Dabak

IPC: G01R35/00 ,  G01R35/04

CPC classification number: G01R35/005 ,  G01R35/04

Abstract: A system is provided for calibrating a device. The system includes a reference component, a sampling component, a calibration component, a comparing component and a proportional integral component. The reference component provides a reference power signal based on a voltage instruction and a current instruction. The sampling component samples a voltage signal to obtain a sampled voltage value and samples a current signal to obtain a sampled current value. The calibration component generates a calibrated power signal based on the sampled voltage value and the sampled current. The comparing component generates an error signal based on the reference power signal and the calibrated power signal. The proportional integral component and the calibration component are a feedback system that is operable to calibrate the gain of the sampled voltage and the sample current based on the error signal.

Abstract translation: 提供用于校准装置的系统。 该系统包括参考组件，采样组件，校准组件，比较组件和比例积分组件。 参考组件基于电压指令和当前指令提供参考功率信号。 采样分量采样电压信号以获得采样电压值并对电流信号进行采样以获得采样电流值。 校准组件基于采样电压值和采样电流产生校准功率信号。 比较组件基于参考功率信号和校准的功率信号产生误差信号。 比例积分分量和校准分量是可用于基于误差信号校准采样电压和采样电流的增益的反馈系统。

公开(公告)号：US20160043773A1

公开(公告)日：2016-02-11

申请号：US14886961

申请日：2015-10-19

Applicant: Texas Instruments Incorporated

Inventor： Tarkesh Pande ,  Anand Dabak ,  Kumaran Vijayasankar ,  Ramanuja Venantham ,  Il Han Kim

IPC: H04B3/54 ,  H04L27/04

CPC classification number: H04B3/54 ,  H04B2203/5416 ,  H04L5/0094 ,  H04L27/04 ,  H04L27/18 ,  H04L27/2602 ,  H04L27/32

Abstract: Systems and methods for routing protocols for power line communications (PLC) are described. In some embodiments, a method performed by a PLC device, such as a PLC meter, may include selecting one or more transmit sub-bands on which to transmit frames, where the transmit sub-bands comprise groups of carrier frequencies. The PLC device then generates a frame comprising a tone map that indicates which transmit sub-bands are used to carry data for the frame. The tone map using two bits per transmit sub-band to indicate a status of each transmit sub-band. The PLC device then transmits the frame on the selected transmit sub-bands. A resolution bit and a mode bit may be used to provide additional information about the transmit sub-bands, such as an amount of power adjustment that has been applied to carrier frequencies and whether dummy bits are transmitted on unused carrier frequencies.

Abstract translation: 描述了用于电力线通信（PLC）的路由协议的系统和方法。 在一些实施例中，由诸如PLC计量器之类的PLC设备执行的方法可以包括选择在其上发送帧的一个或多个发射子带，其中发射子带包括载波频率组。 然后，PLC设备生成包括音调映射的帧，该音调映射指示哪些发送子带被用于携带用于该帧的数据。 每个发送子带使用两位的色调映射表示每个发送子带的状态。 然后，PLC设备在所选择的发送子带上发送该帧。 可以使用分辨率位和模式位来提供关于发射子带的附加信息，例如已经应用于载波频率的功率调整量以及在未使用的载波频率上是否发送虚拟位。

公开(公告)号：USRE45299E1

公开(公告)日：2014-12-23

申请号：US13867015

申请日：2013-04-19

Applicant: Texas Instruments Incorporated

Inventor： Aris Papasakellariou ,  Timothy M. Schmidl ,  Eko N Onggosanusi ,  Anand Dabak

IPC: H04J11/00

CPC classification number: H04L1/06 ,  H04B7/0452 ,  H04B7/12 ,  H04L5/0007 ,  H04L5/0048 ,  H04L25/0226

Abstract: A receiver in an OFDM based communication system is adapted to perform channel estimation using a received reference signal transmitted from at least one antenna The reference signal is substantially located into at least two OFDM symbols of a transmission time interval comprising of more than two OFDM symbols. A power level of said reference signal is divided into said non-consecutive OFDM symbols in said transmission time interval and adapted to use the reference signal located in a first OFDM symbol in succeeding transmission time intervals in addition to the reference symbols in a current transmission time interval and a preceding transmission time interval.

Abstract translation: 基于OFDM的通信系统中的接收机适于使用从至少一个天线发射的接收的参考信号来执行信道估计。参考信号基本上位于包括多于两个OFDM符号的传输时间间隔的至少两个OFDM符号中。 所述参考信号的功率电平在所述传输时间间隔中被划分为所述非连续OFDM符号，并且适于在当前传输时间中除了参考符号之外，使用位于后续传输时间间隔中的第一OFDM符号中的参考信号 间隔和之前的传输时间间隔。

公开(公告)号：US20140012518A1

公开(公告)日：2014-01-09

申请号：US13928562

申请日：2013-06-27

Applicant: Texas Instruments Incorporated

Inventor： Venkata Ramanan Ramamurthy ,  Anand Dabak

IPC: G01F1/66 ,  G06F17/15

CPC classification number: G01F1/66 ,  G01F1/668 ,  G06F17/15

Abstract: A flow meter ultrasonically measures fluid velocity in a pipe. Ultrasonic signals received by ultrasonic transducers are digitized. The difference between two ultrasonic propagation times is determined by computing a discrete cross-correlation of the digitized received signals. Computation time is reduced by computing only a few cross-correlation values near a peak cross-correlation value.

Abstract translation: 流量计超声波地测量管道中的流体速度。 由超声波换能器接收的超声波信号进行数字化处理。 通过计算数字化接收信号的离散互相关来确定两个超声波传播时间之间的差异。 通过计算峰值互相关值附近的几个互相关值来减少计算时间。

公开(公告)号：US20130101003A1

公开(公告)日：2013-04-25

申请号：US13659536

申请日：2012-10-24

Applicant: Texas Instruments Incorporated

Inventor： Ramanuja Vedantham ,  Anand Dabak ,  Kumaran Vijayasankar

IPC: H04B3/46 ,  H04B3/54

CPC classification number: H04B3/54 ,  H04B2203/5408 ,  H04B2203/542 ,  H04B2203/5433

Abstract: Systems and methods for relative phase detection and zero crossing detection for power line communications (PLC) are described. In some embodiments, both transmit and receive PLC devices detect a zero crossing on an AC mains phase. The devices start a phase detection counter (PDC) by generating a zero crossing pulse within 5% of the actual zero crossing time. When a frame is transmitted, the transmitting device includes a PDC value in the frame control header (FCH). The PDC value corresponds to the start time of the FCH. When the frame is received at the receive PLC device, the receive PLC device measures a local PDC value between the zero crossing and the start of the FCH. The receive device compares the local PDC value to the PDC value in the FCH of the received frame and determines if the devices are on the same phase.

Abstract translation: 描述了用于电力线通信（PLC）的相对相位检测和零交叉检测的系统和方法。 在一些实施例中，发送和接收PLC设备都检测AC电源相位上的过零点。 器件通过在实际过零时间的5％内产生过零脉冲来启动相位检测计数器（PDC）。 当发送帧时，发送装置在帧控制报头（FCH）中包括PDC值。 PDC值对应于FCH的开始时间。 当在接收PLC设备处接收到帧时，接收PLC设备测量过零点和FCH开始之间的本地PDC值。 接收设备将本地PDC值与接收帧的FCH中的PDC值进行比较，并确定设备是否处于同一相位。