-
公开(公告)号:US11626494B2
公开(公告)日:2023-04-11
申请号:US17140663
申请日:2021-01-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Hung Chu , Sung-Li Wang , Shuen-Shin Liang , Hsu-Kai Chang , Ding-Kang Shih , Tsungyu Hung , Pang-Yen Tsai , Keng-Chu Lin
IPC: H01L29/417 , H01L23/528 , H01L29/06 , H01L29/423 , H01L29/45 , H01L29/786 , H01L21/02 , H01L21/285 , H01L29/66
Abstract: A semiconductor device structure according to the present disclosure includes a source feature and a drain feature, at least one channel structure extending between the source feature and the drain feature, a gate structure wrapped around each of the at least one channel structure, a semiconductor layer over the gate structure, a dielectric layer over the semiconductor layer, a doped semiconductor feature extending through the semiconductor layer and the dielectric layer to be in contact with the source feature, a metal contact plug over the doped semiconductor feature, and a buried power rail disposed over the metal contact plug.
-
公开(公告)号:US11592748B2
公开(公告)日:2023-02-28
申请号:US16684457
申请日:2019-11-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Hsuan Chuang , Po-Sheng Lu , Shou-Wen Kuo , Cheng-Yi Huang , Chia-Hung Chu
IPC: G03F7/16 , H01L21/027 , G03F7/004
Abstract: A multi-spray RRC process with dynamic control to improve final yield and further reduce resist cost is disclosed. In one embodiment, a method, includes: dispensing a first layer of solvent on a semiconductor substrate while spinning at a first speed for a first time period; dispensing the solvent on the semiconductor substrate while spinning at a second speed for a second time period so as to transform the first layer to a second layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a third speed for a third time period so as to transform the second layer to a third layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a fourth speed for a fourth time period so as to transform the third layer to a fourth layer of the solvent; and dispensing a first layer of photoresist on the fourth layer of the solvent while spinning at a fifth speed for a fifth period of time.
-
公开(公告)号:US11563083B2
公开(公告)日:2023-01-24
申请号:US17162587
申请日:2021-01-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Shuen-Shin Liang , Sung-Li Wang , Hsu-Kai Chang , Chia-Hung Chu , Chien-Shun Liao , Yi-Ying Liu
IPC: H01L29/06 , H01L29/423 , H01L29/66 , H01L29/417 , H01L29/10
Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and methods of fabricating the same are disclosed. The semiconductor device includes first and second S/D regions, a nanostructured channel region disposed between the first and second S/D regions, a gate structure surrounding the nanostructured channel region, first and second contact structures disposed on first surfaces of the first and second S/D regions, a third contact structure disposed on a second surface of the first S/D region, and an etch stop layer disposed on a second surface of the second S/D region. The third contact structure includes a metal silicide layer, a silicide nitride layer disposed on the metal silicide layer, and a conductive layer disposed on the silicide nitride layer.
-
公开(公告)号:US20230016515A1
公开(公告)日:2023-01-19
申请号:US17875675
申请日:2022-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Chien-Shun Liao , Sung-Li Wang , Shuen-Shin Liang , Shu-Lan Chang , Yi-Ying Liu , Chia-Hung Chu , Hsu-Kai Chang
IPC: H01L23/532 , H01L23/528 , H01L21/768
Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.
-
公开(公告)号:US11489057B2
公开(公告)日:2022-11-01
申请号:US17143771
申请日:2021-01-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsu-Kai Chang , Jhih-Rong Huang , Yen-Tien Tung , Chia-Hung Chu , Shuen-Shin Liang , Tzer-Min Shen , Pinyen Lin , Sung-Li Wang
IPC: H01L29/45 , H01L27/092 , H01L29/08 , H01L29/417 , H01L29/66 , H01L21/285 , H01L21/8238 , H01L29/78
Abstract: A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The semiconductor device includes first and second gate structures disposed on first and second fin structures, first and second source/drain (S/D) regions disposed on the first and second fin structures, first and second contact structures disposed on the first and second S/D regions, and a dipole layer disposed at an interface between the first nWFM silicide layer and the first S/D region. The first contact structure includes a first nWFM silicide layer disposed on the first S/D region and a first contact plug disposed on the first nWFM silicide layer. The second contact structure includes a pWFM silicide layer disposed on the second S/D region, a second nWFM silicide layer disposed on the pWFM silicide layer, and a second contact plug disposed on the pWFM silicide layer.
-
公开(公告)号:US20220108919A1
公开(公告)日:2022-04-07
申请号:US17509314
申请日:2021-10-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Sung-Li Wang , Hung-Yi Huang , Yu-Yun Peng , Mrunal A. Khaderbad , Chia-Hung Chu , Shuen-Shin Liang , Keng-Chu Lin
IPC: H01L21/768 , H01L21/265 , H01L23/532 , H01L23/535
Abstract: A method includes receiving a structure having a dielectric layer over a conductive feature, wherein the conductive feature includes a second metal. The method further includes etching a hole through the dielectric layer and exposing the conductive feature and depositing a first metal into the hole and in direct contact with the dielectric layer and the conductive feature, wherein the first metal entirely fills the hole. The method further includes annealing the structure such that atoms of the second metal are diffused into grain boundaries of the first metal and into interfaces between the first metal and the dielectric layer. After the annealing, the method further includes performing a chemical mechanical planarization (CMP) process to remove at least a portion of the first metal.
-
公开(公告)号:US11227794B2
公开(公告)日:2022-01-18
申请号:US16721762
申请日:2019-12-19
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Sung-Li Wang , Shuen-Shin Liang , Yu-Yun Peng , Fang-Wei Lee , Chia-Hung Chu , Mrunal Abhijith Khaderbad , Keng-Chu Lin
IPC: H01L21/768 , H01L21/306 , H01L23/522 , H01L21/285 , H01L21/02 , H01L23/532
Abstract: A multi-layer interconnect structure with a self-aligning barrier structure and a method for fabricating the same is disclosed. For example, the method includes forming a via through an interlayer dielectric (ILD) layer, an etch stop layer (ESL), and a contact structure, pre-cleaning the via with a metal halide, forming a barrier structure on the contact structure in-situ during the pre-cleaning of the via with the metal halide, and depositing a second metal in the via on top of the barrier structure.
-
公开(公告)号:US20210098295A1
公开(公告)日:2021-04-01
申请号:US16589941
申请日:2019-10-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Sung-Li Wang , Hung-Yi Huang , Yu-Yun Peng , Mrunal A. Khaderbad , Chia-Hung Chu , Shuen-Shin Liang , Keng-Chu Lin
IPC: H01L21/768 , H01L21/265 , H01L23/535 , H01L23/532
Abstract: A method includes receiving a structure having a dielectric layer over a conductive feature; etching a hole through the dielectric layer and exposing the conductive feature; depositing a first metal into the hole and in direct contact with the dielectric layer and the conductive feature; depositing a second metal over the first metal; and annealing the structure including the first and the second metals.
-
-
-
-
-
-
-