公开(公告)号：US20220285221A1

公开(公告)日：2022-09-08

申请号：US17550670

申请日：2021-12-14

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Mrunal Abhijith Khaderbad ,  Wei-Yen Woon ,  Cheng-Ming Lin ,  Han-Yu Lin ,  Szu-Hua Chen ,  Jhih-Rong Huang ,  Tzer-Min Shen

IPC分类号： H01L21/8234 ,  H01L21/48 ,  H01L21/768 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

摘要： The present disclosure provides low resistance contacts and damascene interconnects with one or more graphene layers in fin structures of FETs. An example semiconductor device can include a substrate with a fin structure that includes an epitaxial region. The semiconductor device can also include an etch stop layer on the epitaxial region, and an interlayer dielectric layer on the etch stop layer. The semiconductor device can further include a metal contact, above the epitaxial region, formed through the etch stop layer and the interlayer dielectric layer, and a graphene film at interfaces between the metal contact and each of the epitaxial region, the etch stop layer, and the interlayer dielectric layer.

公开(公告)号：US20230378305A1

公开(公告)日：2023-11-23

申请号：US18227731

申请日：2023-07-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Sung-Li WANG ,  Hsu-Kai Chang ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Chia-Hung Chu ,  Tzer-Min Shen ,  Pinyen Lin

IPC分类号： H01L29/45 ,  H01L21/285 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

CPC分类号： H01L29/45 ,  H01L21/28518 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7851 ,  H01L21/823418 ,  H01L29/7839

摘要： A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The semiconductor device includes a substrate, a fin structure disposed on the substrate, a gate structure disposed on the fin structure, a source/drain (S/D) region disposed adjacent to the gate structure, a contact structure disposed on the S/D region, and a dipole layer disposed at an interface between the ternary compound layer and the S/D region. The contact structure includes a ternary compound layer disposed on the S/D region, a work function metal (WFM) silicide layer disposed on the ternary compound layer, and a contact plug disposed on the WFM silicide layer.

公开(公告)号：US11545397B2

公开(公告)日：2023-01-03

申请号：US17143698

申请日：2021-01-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Han-Yu Lin ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Tzer-Min Shen ,  Fu-Ting Yen ,  Gary Chan ,  Keng-Chu Lin ,  Li-Te Lin ,  Pinyen Lin

IPC分类号： H01L21/8234 ,  H01L21/3065

摘要： The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure. The oxygen-free cyclic etching process can include two etching processes to selectively etch the dielectric layer over the channel layer.

公开(公告)号：US12040372B2

公开(公告)日：2024-07-16

申请号：US17818918

申请日：2022-08-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsu-Kai Chang ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Chia-Hung Chu ,  Shuen-Shin Liang ,  Tzer-Min Shen ,  Pinyen Lin ,  Sung-Li Wang

IPC分类号： H01L29/45 ,  H01L21/285 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/45 ,  H01L21/28518 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The semiconductor device includes first and second gate structures disposed on first and second fin structures, first and second source/drain (S/D) regions disposed on the first and second fin structures, first and second contact structures disposed on the first and second S/D regions, and a dipole layer disposed at an interface between the first nWFM silicide layer and the first S/D region. The first contact structure includes a first nWFM silicide layer disposed on the first S/D region and a first contact plug disposed on the first nWFM silicide layer. The second contact structure includes a pWFM silicide layer disposed on the second S/D region, a second nWFM silicide layer disposed on the pWFM silicide layer, and a second contact plug disposed on the pWFM silicide layer.

公开(公告)号：US11810960B2

公开(公告)日：2023-11-07

申请号：US17197892

申请日：2021-03-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Sung-Li Wang ,  Hsu-Kai Chang ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Chia-Hung Chu ,  Tzer-Min Shen ,  Pinyen Lin

IPC分类号： H01L29/45 ,  H01L21/285 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

CPC分类号： H01L29/45 ,  H01L21/28518 ,  H01L21/823418 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7839 ,  H01L29/7851

摘要： A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The semiconductor device includes a substrate, a fin structure disposed on the substrate, a gate structure disposed on the fin structure, a source/drain (S/D) region disposed adjacent to the gate structure, a contact structure disposed on the S/D region, and a dipole layer disposed at an interface between the ternary compound layer and the S/D region. The contact structure includes a ternary compound layer disposed on the S/D region, a work function metal (WFM) silicide layer disposed on the ternary compound layer, and a contact plug disposed on the WFM silicide layer.

公开(公告)号：US11489057B2

公开(公告)日：2022-11-01

申请号：US17143771

申请日：2021-01-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsu-Kai Chang ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Chia-Hung Chu ,  Shuen-Shin Liang ,  Tzer-Min Shen ,  Pinyen Lin ,  Sung-Li Wang

IPC分类号： H01L29/45 ,  H01L27/092 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L21/285 ,  H01L21/8238 ,  H01L29/78

摘要： A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The semiconductor device includes first and second gate structures disposed on first and second fin structures, first and second source/drain (S/D) regions disposed on the first and second fin structures, first and second contact structures disposed on the first and second S/D regions, and a dipole layer disposed at an interface between the first nWFM silicide layer and the first S/D region. The first contact structure includes a first nWFM silicide layer disposed on the first S/D region and a first contact plug disposed on the first nWFM silicide layer. The second contact structure includes a pWFM silicide layer disposed on the second S/D region, a second nWFM silicide layer disposed on the pWFM silicide layer, and a second contact plug disposed on the pWFM silicide layer.

公开(公告)号：US20220020644A1

公开(公告)日：2022-01-20

申请号：US17143698

申请日：2021-01-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Han-Yu LIN ,  Jhih-Rong Huang ,  Yen-Tien Tung ,  Tzer-Min Shen ,  Fu-Ting Yen ,  Gary Chan ,  Keng-Chu Lin ,  Li-Te Lin ,  Pinyen Lin

IPC分类号： H01L21/8234 ,  H01L21/3065

摘要： The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a first channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure. The process of performing the oxygen-free cyclic etching process can include performing a first etching process to selectively etch the dielectric layer over the channel layer of the second portion of the fin structure with a first etching selectivity, and performing a second etching process to selectively etch the dielectric layer over the channel layer of the second portion of fin structure with a second etching selectivity greater than the first etching selectivity