-
公开(公告)号：US20080210938A1
公开(公告)日：2008-09-04
申请号：US11961221
申请日：2007-12-20
IPC分类号： H01L29/778 , H01L29/24
CPC分类号： H01L27/088 , H01L21/32139 , H01L27/0605 , H01L29/0619 , H01L29/0623 , H01L29/1608 , H01L29/267 , H01L29/4236 , H01L29/66068 , H01L29/7828
摘要： A semiconductor device with superior long-term reliability is disclosed that alleviates current concentration into a switch structure arranged at an outermost portion. The semiconductor device comprises hetero semiconductor regions formed of polycrystalline silicon having a band gap width different from that of a drift region and hetero-adjoined with the drift region, a gate insulation film, a gate electrode adjoined to the gate insulation film, a source electrode connected to a source contact portion of the hetero semiconductor regions and an outermost switch structure and a repeating portion switch structure with a drain electrode connected to a substrate region. In a conduction state, the outermost switch structure comprises a mechanism in which the current flowing at the outermost switch structure becomes smaller than the current flowing at the repeating portion switch structure.
摘要翻译： 公开了一种具有优异的长期可靠性的半导体器件，其将电流浓度减轻到布置在最外部的开关结构。 半导体器件包括由多晶硅形成的异质半导体区域，该多晶硅的带隙宽度与漂移区域的带隙宽度不同，并且与漂移区域异质相邻，栅极绝缘膜，与栅极绝缘膜邻接的栅电极，源电极 连接到异质半导体区域的源极接触部分和最外面的开关结构以及具有连接到衬底区域的漏电极的重复部分开关结构。 在导通状态下，最外面的开关结构包括一种机构，其中在最外侧开关结构处流动的电流变得小于在重复部分开关结构处流动的电流。
-
公开(公告)号：US20080108211A1
公开(公告)日：2008-05-08
申请号：US11907401
申请日：2007-10-11
IPC分类号： H01L21/283
CPC分类号： H01L29/267 , H01L29/0623 , H01L29/0847 , H01L29/1608 , H01L29/66068 , H01L29/7828
摘要： A method for producing a semiconductor device which includes: a semiconductor base, a hetero semiconductor region made of a semiconductor material different in band gap from a semiconductor material for the semiconductor base, and so configured as to form a hetero junction in combination with the semiconductor base, a gate insulating film so configured as to contact with the hetero junction between the semiconductor base and the hetero semiconductor region, a gate electrode so configured as to contact with the gate insulating film, a source electrode connected to the hetero semiconductor region, and a drain electrode connected to the semiconductor base. The method includes: forming the following in a self-aligning manner, by using a certain mask material: a source contact hole for the source electrode, and the gate electrode.
摘要翻译： 一种半导体器件的制造方法，其特征在于，包括：半导体基底，与半导体基板的半导体材料的带隙不同的半导体材料构成的异质半导体区域，并且与半导体基板结合形成异质结 基底，被配置为与半导体基底和异质半导体区域之间的异质结接触的栅极绝缘膜，被配置为与栅极绝缘膜接触的栅极电极，连接到异质半导体区域的源极电极，以及 连接到半导体基底的漏电极。 该方法包括：通过使用某种掩模材料：源电极的源极接触孔和栅电极，以自对准的方式形成以下。
-
公开(公告)号：US07910923B2
公开(公告)日：2011-03-22
申请号：US11961221
申请日：2007-12-20
IPC分类号： H01L29/04
CPC分类号： H01L27/088 , H01L21/32139 , H01L27/0605 , H01L29/0619 , H01L29/0623 , H01L29/1608 , H01L29/267 , H01L29/4236 , H01L29/66068 , H01L29/7828
摘要： A semiconductor device with superior long-term reliability is disclosed that alleviates current concentration into a switch structure arranged at an outermost portion. The semiconductor device comprises hetero semiconductor regions formed of polycrystalline silicon having a band gap width different from that of a drift region and hetero-adjoined with the drift region, a gate insulation film, a gate electrode adjoined to the gate insulation film, a source electrode connected to a source contact portion of the hetero semiconductor regions and an outermost switch structure and a repeating portion switch structure with a drain electrode connected to a substrate region. In a conduction state, the outermost switch structure comprises a mechanism in which the current flowing at the outermost switch structure becomes smaller than the current flowing at the repeating portion switch structure.
摘要翻译： 公开了一种具有优异的长期可靠性的半导体器件，其将电流浓度减轻到布置在最外部的开关结构。 半导体器件包括由多晶硅形成的异质半导体区域，该多晶硅的带隙宽度与漂移区域的带隙宽度不同，并且与漂移区域异质相邻，栅极绝缘膜，与栅极绝缘膜邻接的栅电极，源电极 连接到异质半导体区域的源极接触部分和最外面的开关结构以及具有连接到衬底区域的漏电极的重复部分开关结构。 在导通状态下，最外面的开关结构包括一种机构，其中在最外侧开关结构处流动的电流变得小于在重复部分开关结构处流动的电流。
-
44.发明授权公开(公告)号：US07605017B2
公开(公告)日：2009-10-20
申请号：US11870561
申请日：2007-10-11
IPC分类号： H01L21/00 , H01L21/338 , H01L21/337 , H01L21/8249
CPC分类号： H01L29/0847 , H01L29/0623 , H01L29/1608 , H01L29/267 , H01L29/66068 , H01L29/7828
摘要： Methods of manufacturing a semiconductor device and resulting products. The semiconductor device includes a semiconductor substrate, a hetero semiconductor region hetero-adjoined with the semiconductor substrate, a gate insulation layer contacting the semiconductor substrate and a heterojunction of the hetero semiconductor region, a gate electrode formed on the gate insulation layer, an electric field alleviation region spaced apart from a heterojunction driving end of the heterojunction that contacts the gate insulation layer by a predetermined distance and contacting the semiconductor substrate and the gate insulation layer, a source electrode contacting the hetero semiconductor region and a drain electrode contacting the semiconductor substrate. A mask layer is formed on the hetero semiconductor region, and the electric field alleviation region and the heterojunction driving end are formed by using at least a portion of the first mask layer.
摘要翻译： 制造半导体器件和所得产品的方法。 半导体器件包括半导体衬底，与半导体衬底异质连接的异质半导体区域，与半导体衬底接触的栅极绝缘层和异质半导体区域的异质结，形成在栅极绝缘层上的栅电极，电场 与异质结的异质结驱动端隔开预定距离并接触半导体衬底和栅极绝缘层，与异质半导体区接触的源极和与半导体衬底接触的漏电极的缓冲区。 在异质半导体区域上形成掩模层，并且通过使用第一掩模层的至少一部分形成电场缓和区域和异质结驱动端。
-
公开(公告)号：US07642149B2
公开(公告)日：2010-01-05
申请号：US11907401
申请日：2007-10-11
IPC分类号： H01L21/8238
CPC分类号： H01L29/267 , H01L29/0623 , H01L29/0847 , H01L29/1608 , H01L29/66068 , H01L29/7828
摘要： A method for producing a semiconductor device which includes: a semiconductor base, a hetero semiconductor region made of a semiconductor material different in band gap from a semiconductor material for the semiconductor base, and so configured as to form a hetero junction in combination with the semiconductor base, a gate insulating film so configured as to contact with the hetero junction between the semiconductor base and the hetero semiconductor region, a gate electrode so configured as to contact with the gate insulating film, a source electrode connected to the hetero semiconductor region, and a drain electrode connected to the semiconductor base. The method includes: forming the following in a self-aligning manner, by using a certain mask material: a source contact hole for the source electrode, and the gate electrode.
摘要翻译： 一种半导体器件的制造方法，其特征在于，包括：半导体基底，与半导体基板的半导体材料的带隙不同的半导体材料构成的异质半导体区域，与半导体基板结合形成异质结 基底，被配置为与半导体基底和异质半导体区域之间的异质结接触的栅极绝缘膜，被配置为与栅极绝缘膜接触的栅极电极，连接到异质半导体区域的源极电极，以及 连接到半导体基底的漏电极。 该方法包括：通过使用某种掩模材料：源电极的源极接触孔和栅电极，以自对准的方式形成以下。
-
46.发明申请METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED THEREFROM 有权制造半导体器件的方法及其制造的半导体器件公开(公告)号：US20080203401A1
公开(公告)日：2008-08-28
申请号：US12033468
申请日：2008-02-19
IPC分类号： H01L29/778 , H01L21/336
CPC分类号： H01L29/0847 , H01L29/1608 , H01L29/267 , H01L29/66068 , H01L29/7828
摘要： A method for producing a semiconductor device includes forming a first hetero-semiconductor layer as a hetero-junction to a surface of a silicon carbide epitaxial layer. This layer is composed of polycrystalline silicon having a band gap different from that of the silicon carbide epitaxial layer. An etching stopper layer composed of a material having a different etching rate from that of the polycrystalline silicon is formed on the surface of the first hetero-semiconductor layer. A second hetero-semiconductor layer composed of polycrystalline silicon is formed so that the second hetero-semiconductor layer contacts the surface of the first hetero-semiconductor layer and the etching stopper layer. The etching stopper layer is removed, the first hetero-semiconductor layer is thermally oxidized, and the thermally oxidized portion is then removed.
摘要翻译： 一种制造半导体器件的方法包括：将第一异质半导体层形成为与碳化硅外延层的表面的异质结。 该层由具有与碳化硅外延层的带隙不同的带隙的多晶硅构成。 在第一异质半导体层的表面上形成由具有与多晶硅的蚀刻速率不同的蚀刻速率的材料构成的蚀刻停止层。 形成由多晶硅构成的第二异质半导体层，使得第二异质半导体层与第一异质半导体层和蚀刻停止层的表面接触。 除去蚀刻停止层，将第一异质半导体层热氧化，然后除去热氧化部分。
-
公开(公告)号：US20080121933A1
公开(公告)日：2008-05-29
申请号：US11870561
申请日：2007-10-11
IPC分类号： H01L29/778 , H01L21/04 , H01L21/336
CPC分类号： H01L29/0847 , H01L29/0623 , H01L29/1608 , H01L29/267 , H01L29/66068 , H01L29/7828
摘要： Methods of manufacturing a semiconductor device and resulting products. The semiconductor device includes a semiconductor substrate, a hetero semiconductor region hetero-adjoined with the semiconductor substrate, a gate insulation layer contacting the semiconductor substrate and a heterojunction of the hetero semiconductor region, a gate electrode formed on the gate insulation layer, an electric field alleviation region spaced apart from a heterojunction driving end of the heterojunction that contacts the gate insulation layer by a predetermined distance and contacting the semiconductor substrate and the gate insulation layer, a source electrode contacting the hetero semiconductor region and a drain electrode contacting the semiconductor substrate. A mask layer is formed on the hetero semiconductor region, and the electric field alleviation region and the heterojunction driving end are formed by using at least a portion of the first mask layer.
摘要翻译： 制造半导体器件和所得产品的方法。 半导体器件包括半导体衬底，与半导体衬底异质连接的异质半导体区域，与半导体衬底接触的栅极绝缘层和异质半导体区域的异质结，形成在栅极绝缘层上的栅电极，电场 与异质结的异质结驱动端隔开预定距离并接触半导体衬底和栅极绝缘层，与异质半导体区接触的源极和与半导体衬底接触的漏电极的缓冲区。 在异质半导体区域上形成掩模层，并且通过使用第一掩模层的至少一部分形成电场缓和区域和异质结驱动端。
-
48.发明授权公开(公告)号：US08067776B2
公开(公告)日：2011-11-29
申请号：US12105318
申请日：2008-04-18
IPC分类号： H01L29/12 , H01L29/76 , H01L29/78 , H01L21/28 , H01L21/336
CPC分类号： H01L29/66068 , H01L29/513 , H01L29/7828
摘要： Methods of manufacturing a semiconductor device including a semiconductor substrate and a hetero semiconductor region including a semiconductor material having a band gap different from that of the semiconductor substrate and contacting a portion of a first surface of the semiconductor substrate are taught herein, as are the resulting devices. The method comprises depositing a first insulating film on exposed portions of the first surface of the semiconductor substrate and on exposed surfaces of the hetero semiconductor material and forming a second insulating film between the first insulating film and facing surfaces of the semiconductor substrate and the hetero semiconductor region by performing a thermal treatment in an oxidizing atmosphere.
摘要翻译： 本文教导了制造包括半导体衬底和包括具有与半导体衬底的带隙不同的带隙并与半导体衬底的第一表面的一部分接触的半导体材料的半导体区域的半导体器件的制造方法， 设备。 该方法包括在半导体衬底的第一表面的暴露部分和异质半导体材料的暴露表面上沉积第一绝缘膜，并在第一绝缘膜和半导体衬底和异质半导体的相对表面之间形成第二绝缘膜 通过在氧化气氛中进行热处理。
-
公开(公告)号：US07902555B2
公开(公告)日：2011-03-08
申请号：US12325377
申请日：2008-12-01
IPC分类号： H01L29/15 , H01L31/0312
CPC分类号： H01L29/0847 , H01L29/0623 , H01L29/0642 , H01L29/0646 , H01L29/0649 , H01L29/0696 , H01L29/1608 , H01L29/267 , H01L29/7828
摘要： A hetero semiconductor corner region, which is a current-concentration relief region that keeps a reverse bias current from concentrating on the convex corner, is arranged in a hetero semiconductor region. Thereby, a current concentration on the convex corner can be prevented. As a result, an interrupting performance can be improved at the time of interruption, and at the same time, the generation of the hot spot where in a specific portion is prevented at the time of conduction to suppress deterioration in a specific portion, thereby ensuring a long-term reliability. Further, when the semiconductor chip is used in an L load circuit or the like, for example, at the time of conduction or during a transient response time to the interrupted state, in an index such as a short resistant load amount and an avalanche resistant amount, which are indexes of a breakdown tolerance when overcurrent or overvoltage occurs, the current concentration on a specific portion can be prevented, and thus, these breakdown tolerances can also be improved.
摘要翻译： 作为将反向偏置电流保持集中在凸角上的电流 - 浓度释放区域的异质半导体角区域设置在异质半导体区域中。 由此，可以防止凸角上的电流集中。 结果，在中断时可以提高中断性能，同时，在导通时防止特定部位的热点的产生，抑制特定部分的劣化，从而确保 长期可靠。 此外，例如在导通时或半导体芯片用于L负载电路等时，例如，在短时间响应时间到中断状态时，以诸如短路负载量和雪崩阻抗的指标 量是当发生过电流或过电压时的击穿容限的指标，可以防止特定部分上的电流浓度，因此也可以提高这些击穿公差。
-
50.发明申请METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED THEREOF 有权制造半导体器件的方法及其制造的半导体器件公开(公告)号：US20080303036A1
公开(公告)日：2008-12-11
申请号：US12105318
申请日：2008-04-18
CPC分类号： H01L29/66068 , H01L29/513 , H01L29/7828
摘要： Methods of manufacturing a semiconductor device including a semiconductor substrate and a hetero semiconductor region including a semiconductor material having a band gap different from that of the semiconductor substrate and contacting a portion of a first surface of the semiconductor substrate are taught herein, as are the resulting devices. The method comprises depositing a first insulating film on exposed portions of the first surface of the semiconductor substrate and on exposed surfaces of the hetero semiconductor material and forming a second insulating film between the first insulating film and facing surfaces of the semiconductor substrate and the hetero semiconductor region by performing a thermal treatment in an oxidizing atmosphere.
摘要翻译： 本文教导了制造包括半导体衬底和包括具有与半导体衬底的带隙不同的带隙并与半导体衬底的第一表面的一部分接触的半导体材料的半导体区域的半导体器件的制造方法， 设备。 该方法包括在半导体衬底的第一表面的暴露部分和异质半导体材料的暴露表面上沉积第一绝缘膜，并在第一绝缘膜和半导体衬底和异质半导体的相对表面之间形成第二绝缘膜 通过在氧化气氛中进行热处理。
-
-
-
-
-
-
-
-
-
搜索结果
425 条记录 (耗时 0.025 秒)