公开(公告)号：US07807177B2

公开(公告)日：2010-10-05

申请号：US10926088

申请日：2004-08-26

申请人： Toshikazu Nakamura ,  Kunio Matsumoto ,  Kazuhiro Fukuta

发明人： Toshikazu Nakamura ,  Kunio Matsumoto ,  Kazuhiro Fukuta

IPC分类号： C07K14/575 ,  A61K38/22 ,  C12N15/00

CPC分类号： C07K14/4753

摘要： The present invention provides a segment of glycosylation-deficient HGF having mutation(s) introduced into an amino acid sequence so as to prevent glycosylation at at least one glycosylation site of a hepatocyte growth factor (HGF), and a method of producing the same. The segment of glycosylation-deficient HGF of the present invention has the same activity as that of a segment of glycosylated HGF, therefore, it is useful as an alternate for a segment of glycosylated HGF.

摘要翻译： 本发明提供了具有引入氨基酸序列的突变以防止肝细胞生长因子（HGF）的至少一个糖基化位点处的糖基化的糖基化缺陷型HGF的片段及其制备方法。 本发明的糖基化缺陷型HGF片段具有与糖基化HGF片段相同的活性，因此，作为糖基化HGF片段的替代物是有用的。

公开(公告)号：US20100168003A1

公开(公告)日：2010-07-01

申请号：US12226447

申请日：2007-03-30

申请人： Toshikazu Nakamura ,  Hiroshi Funakoshi ,  Daisuke Miyazawa ,  Kunio Iwatani

发明人： Toshikazu Nakamura ,  Hiroshi Funakoshi ,  Daisuke Miyazawa ,  Kunio Iwatani

IPC分类号： A61K38/16 ,  A61K31/711 ,  A61P25/28

CPC分类号： A61K38/1833 ,  C07K14/4753

摘要： The present invention discloses an agent for treating a polyglutamine aggregation-caused disease or suppressing its onset, which comprises, as an active ingredient, (1) (i) HGF protein, (ii) a partial peptide of HGF protein that is substantially equivalent in activity to HGF protein, or a salt of either of them, or(2) DNA containing (i) DNA encoding HGF protein, (ii) DNA encoding a partial peptide of HGF protein that is substantially equivalent in activity to HGF protein or (iii) DNA which encodes a protein or a peptide that is substantially equivalent in activity to HGF protein and hybridizes with DNA comprising a complementary base sequence of either of the above-mentioned DNAs under a stringent condition.

摘要翻译： 本发明公开了一种用于治疗聚谷氨酰胺聚集引起的疾病或抑制其发病的药剂，其包含作为活性成分的（1）（i）HGF蛋白，（ii）HGF蛋白的部分肽，其基本相当于 （2）含有（i）编码HGF蛋白的DNA的DNA，（ii）编码与HGF蛋白活性基本相同的HGF蛋白的部分肽的DNA，或（iii）对HGF蛋白的活性，或 ）编码与HGF蛋白活性基本相同的蛋白质或肽的DNA，并与包含上述DNA的互补碱基序列的DNA在严格条件下杂交。

公开(公告)号：US07741452B2

公开(公告)日：2010-06-22

申请号：US10582973

申请日：2004-12-15

申请人： Toshikazu Nakamura ,  Kunio Matsumoto ,  Kazuhiro Fukuta

发明人： Toshikazu Nakamura ,  Kunio Matsumoto ,  Kazuhiro Fukuta

IPC分类号： C07K14/175

CPC分类号： C07K14/4753 ,  A61K48/00

摘要： The invention provides a modified glycosylation-deficient HGF and a production method thereof. The glycosylation-deficient HGF is produced by introducing amino acid mutation(s) so that no glycosylation take place at at least one glycosylation site of hepatocyte growth factor.

摘要翻译： 本发明提供了修饰的糖基化缺陷型HGF及其制备方法。 通过引入氨基酸突变来产生糖基化缺陷型HGF，使得在肝细胞生长因子的至少一个糖基化位点处不发生糖基化。

公开(公告)号：US20080137466A1

公开(公告)日：2008-06-12

申请号：US11979237

申请日：2007-10-31

申请人： Toshikazu Nakamura

发明人： Toshikazu Nakamura

IPC分类号： G11C5/14

CPC分类号： G11C8/08 ,  G11C11/4085 ,  G11C11/4087 ,  G11C29/02 ,  G11C29/021 ,  G11C29/028 ,  G11C2029/1202

摘要： In a semiconductor memory having a plurality of word lines and bit lines and memory cells arranged at the positions of intersection thereof, a word driver circuit that drives the word line has a drive PMOS transistor and drive NMOS transistor which are connected in series between a first node and a second node and each of which has a gate connected to a third node, the word line being connected to a connection node of the two transistors. A first voltage or a second voltage lower than the first voltage is then applied to the third node, and the first voltage or second voltage is applied to the first node. In addition, between the third node and the gate of the drive PMOS transistor, there is provided a leakage prevention NMOS transistor having a gate applied with the first voltage or a voltage in the vicinity thereof.

摘要翻译： 在具有布置在其相交位置处的多个字线和位线和存储单元的半导体存储器中，驱动字线的字驱动电路具有驱动PMOS晶体管和驱动NMOS晶体管，其串联连接在第一 节点和第二节点，并且每个节点具有连接到第三节点的栅极，所述字线连接到所述两个晶体管的连接节点。 然后将第一电压或低于第一电压的第二电压施加到第三节点，并且将第一电压或第二电压施加到第一节点。 此外，在驱动PMOS晶体管的第三节点和栅极之间，提供了具有施加有第一电压的栅极或其附近的电压的防漏NMOS晶体管。

公开(公告)号：US20070255442A1

公开(公告)日：2007-11-01

申请号：US11717781

申请日：2007-03-14

申请人： Toshikazu Nakamura ,  Shigeru Obayashi ,  Kenichiro Hagiwara ,  Yoshikazu Aikawa

发明人： Toshikazu Nakamura ,  Shigeru Obayashi ,  Kenichiro Hagiwara ,  Yoshikazu Aikawa

IPC分类号： G06F19/00

CPC分类号： G05B23/024

摘要： The process fault analyzer includes a process data editing part for extracting a process characteristic quantity from process data in a time series stored in a process data storing part, a fault analysis rule data storing part for storing a fault analysis rule for performing fault detection on a product manufactured in a manufacturing system and on manufacturing equipment, based on the process characteristic quantity, and a fault determining part for determining existence/absence of a fault in a product and in manufacturing equipment based on the process characteristic quantity. A partial least square regression (PLS) model is used as an estimation model used for the fault analysis rule. Also, Q statistics and T2 statistics are used, and the fault determining part determines a fault in manufacturing equipment when values of the statistics are the same as set value or more.

摘要翻译： 过程故障分析器包括：处理数据编辑部分，用于从存储在过程数据存储部分中的时间序列中的过程数据中提取处理特征量;故障分析规则数据存储部分，用于存储用于对故障检测执行故障检测的故障分析规则; 基于过程特征量在制造系统和制造设备中制造的产品，以及基于处理特征量的用于确定产品和制造设备中的故障的存在/不存在的故障确定部。 使用偏最小二乘回归（PLS）模型作为用于故障分析规则的估计模型。 此外，使用Q统计和T 2等级统计，并且当统计量的值与设定值相同时，故障确定部分确定制造设备中的故障。

公开(公告)号：US20070192064A1

公开(公告)日：2007-08-16

申请号：US11705598

申请日：2007-02-13

申请人： Toshikazu Nakamura ,  Shigeru Obayashi ,  Kenichiro Hagiwara ,  Yoshikazu Aikawa

发明人： Toshikazu Nakamura ,  Shigeru Obayashi ,  Kenichiro Hagiwara ,  Yoshikazu Aikawa

IPC分类号： G06F19/00

CPC分类号： G06Q10/06

摘要： A process fault analyzer, capable of analyzing fault caused due to a process performed by a plurality of process equipments, is provided. The analyzer includes: a plurality of process data storing units which store process data of the respective process equipments; a process data editing unit which calculates process characteristic quantity from various kinds of process data stored on the process data storing units; a plurality of process characteristic quantity data storing units which store process characteristic quantity of the respective process equipments calculated by the process data editing unit; a process characteristic quantity integration unit which accesses the process characteristic quantity data storing units, extracts process characteristic quantity of the same wafer, and integrates them; and a fault determination unit which determines presence or absence of fault according to the integrated process characteristic quantity data integrated by the process characteristic quantity integration unit.

摘要翻译： 提供一种能够分析由多个处理设备进行的处理引起的故障的过程故障分析器。 分析器包括：多个处理数据存储单元，存储各个处理设备的处理数据; 处理数据编辑单元，其从存储在处理数据存储单元上的各种处理数据计算处理特征量; 多个处理特征量数据存储单元，其存储由处理数据编辑单元计算出的各个处理设备的处理特征量; 访问处理特征量数据存储单元的处理特征量整合单元，提取同一晶片的处理特征量，并对其进行积分; 以及故障判定单元，其根据由所述处理特征量积分单元积分的积分处理特征量数据来判定是否存在故障。

公开(公告)号：US07243274B2

公开(公告)日：2007-07-10

申请号：US11206170

申请日：2005-08-18

申请人： Masafumi Yamazaki ,  Takaaki Suzuki ,  Toshikazu Nakamura ,  Satoshi Eto ,  Toshiya Miyo ,  Ayako Sato ,  Takayuki Yoneda ,  Noriko Kawamura

发明人： Masafumi Yamazaki ,  Takaaki Suzuki ,  Toshikazu Nakamura ,  Satoshi Eto ,  Toshiya Miyo ,  Ayako Sato ,  Takayuki Yoneda ,  Noriko Kawamura

IPC分类号： G11C29/00

CPC分类号： G11C29/48 ,  G11C29/36

摘要： An external terminal receives an external signal so as to access the first and second memory chips. The test starting terminal receives a test starting signal activated when the first or second memory chip is tested and inactivated when the first and second memory chips are normally operated. The access signal generator converts the external signal to a memory access signal of the first memory chip. The first selector selects the external signal, which is a test signal, during activation of the test starting signal, selects the memory access signal during the inactivation of the test starting signal. That is, during the test modes, the first memory chip can be directly accessed from the exterior. For this reason, the test program for testing the first memory chip alone can be diverted as the test program following an assembly of the semiconductor device.

摘要翻译： 外部终端接收外部信号以访问第一和第二存储器芯片。 当第一和第二存储器芯片正常工作时，测试启动终端接收到测试启动信号，当第一或第二存储器芯片被测试和非激活时激活。 访问信号发生器将外部信号转换为第一存储器芯片的存储器访问信号。 第一选择器在激活测试启动信号期间选择作为测试信号的外部信号，在测试启动信号失效期间选择存储器访问信号。 也就是说，在测试模式期间，可以从外部直接访问第一存储器芯片。 因此，在半导体器件的组装之后，用于单独测试第一存储器芯片的测试程序可以作为测试程序转移。

公开(公告)号：US20070021335A1

公开(公告)日：2007-01-25

申请号：US10575712

申请日：2004-08-13

申请人： Satoshi Takeo ,  Keiko Takagi ,  Norio Takagi ,  Toshikazu Nakamura

发明人： Satoshi Takeo ,  Keiko Takagi ,  Norio Takagi ,  Toshikazu Nakamura

IPC分类号： A61K38/18

CPC分类号： A61K38/1833

摘要： The present invention provides an agent for improving mental disorders due to cerebral dysfunction and an agent for inhibiting vascular hyperpermeability each containing a hepatocyte growth factor. The agent for improving mental disorders according to the present invention is useful in improving mental disorders, particularly decline in learning and memory function, due to cerebral dysfunction occurred in blood circulation disorders in the brain (for example, cerebral infarction, cerebral hemorrhage, lacunar stroke, Biswanger's disease, cerebral thrombosis, subarachnoid hemorrhage, cerebrovascular moyamoya disease, carotid cerebral arterial fibrous muscular plasia, cerebral arterial sclerosis, internal carotid artery occlusion, hypertensive encephalopathy, cerebral edema, etc.) and neurodegenerative disorders (for example, multiple sclerosis, Parkinson's disease, Parkinson'syndrome, Huntington's chorea, cerebrovascular dementia and Alzheimer dementia), epilepsy, head injury, etc. The agent for inhibiting vascular hyperpermeability according to the present invention is efficacious to blood hyperpermeability in the brain due to blood circulation disorders in the brain (for example, cerebral infarction, cerebral hemorrhage, lacunar stroke, Biswanger's disease, cerebral thrombosis, subarachnoid hemorrhage, cerebrovascular moyamoya disease, carotid cerebral arterial fibrous muscular plasia, cerebral arterial sclerosis, internal carotid artery occlusion, hypertensive encephalopathy, cerebral edema, etc.), blood leakage, edema, subcutaneous hemorrhage and bleeding tendency due to vascular hyperpermeability in various tissues (including internal organs).

摘要翻译： 本发明提供一种用于改善由于脑功能障碍引起的精神障碍的药剂和每种含有肝细胞生长因子的抑制血管高渗透性的药剂。 根据本发明的用于改善精神障碍的药剂可用于改善精神障碍，特别是由于脑中血液循环障碍中发生的脑功能障碍（例如脑梗塞，脑出血，腔隙性中风）引起的学习和记忆功能的下降 ，Biswanger氏病，脑血栓形成，蛛网膜下腔出血，脑血管性moyamoya病，颈动脉大脑动脉纤维性肌浆膜炎，脑动脉硬化，颈内动脉闭塞，高血压性脑病，脑水肿等）和神经退行性疾病（例如多发性硬化症，帕金森病 疾病，帕金森综合症，亨廷顿氏舞蹈病，脑血管性痴呆和阿尔茨海默痴呆），癫痫，头部损伤等。根据本发明的用于抑制血管高渗透性的药剂由于脑中的血液循环障碍而对脑中的血液渗透性过高是有效的 （例如， 脑梗塞，脑出血，腔隙性脑卒中，Biswanger氏病，脑血栓形成，蛛网膜下腔出血，脑血管性moyamoya病，颈动脉脑动脉纤维性肌浆膜炎，脑动脉硬化，颈内动脉闭塞，高血压性脑病，脑水肿等），血液渗漏 ，水肿，皮下出血和出血倾向，由于各种组织（包括内脏器官）的血管渗透性过高。

公开(公告)号：US20050233299A1

公开(公告)日：2005-10-20

申请号：US10967247

申请日：2004-10-19

申请人： Yoshiki Sawa ,  Hikaru Matsuda ,  Toshikazu Nakamura ,  Shinya Mizuno

发明人： Yoshiki Sawa ,  Hikaru Matsuda ,  Toshikazu Nakamura ,  Shinya Mizuno

IPC分类号： A01N1/02

CPC分类号： A01N1/02 ,  A01N1/0226

摘要： A method of preserving a harvested organ, a harvested organ tissue or a part thereof for a long time, which comprises perfusing and/or immersing the harvested organ with a solution containing HGF having a temperature of 0 to 6° C., and which method is capable of maintaining harvested organs for transplantation in a high physiological state and preventing ischemia/reperfusion injury of the organs transplanted.

摘要翻译： 一种长期保存收获的器官，收获的器官组织或其部分的方法，其包括用含有0至6℃温度的HGF的溶液灌注和/或浸没收获的器官，以及哪种方法 能够在高生理状态下维持收集的器官移植，并预防移植器官的缺血/再灌注损伤。

公开(公告)号：US20050052935A1

公开(公告)日：2005-03-10

申请号：US10968072

申请日：2004-10-20

申请人： Toshiya Miyo ,  Toshikazu Nakamura ,  Satoshi Eto

发明人： Toshiya Miyo ,  Toshikazu Nakamura ,  Satoshi Eto

IPC分类号： G11C11/4097 ,  G11C8/00

CPC分类号： G11C11/4097

摘要： Second memory cells of a second memory block each have an area 2a times (a is a positive integer) that of each first memory cell of a first memory block. Sizing the first and second memory cells in a predetermined ratio can make easily identical the dimensions of the first memory block and the second memory block. Consequently, it is possible to easily align peripheral circuits to lie around the plurality of first and second memory blocks, such as decoders. This also facilitates the wiring of signal lines to be connected to the peripheral circuits. This makes it possible to improve the layout design efficiency for a semiconductor integrated circuit. Thus, a plurality of types of memory blocks can be formed on a semiconductor integrated circuit efficiently. The semiconductor integrated circuit can be prevented from increasing in chip size depending on the layout design, owing to its simplified layout.

摘要翻译： 第二存储器块的第二存储器单元各自具有第一存储器块的每个第一存储器单元的区域2。 以预定比例对第一和第二存储器单元进行尺寸可以使得第一存储块和第二存储块的尺寸容易相同。 因此，可以容易地将外围电路对准在诸如解码器之类的多个第一和第二存储器块周围。 这也有助于连接到外围电路的信号线的布线。 这使得可以提高半导体集成电路的布局设计效率。 因此，可以有效地在半导体集成电路上形成多种类型的存储块。 由于布局简单，可以防止半导体集成电路因布局设计而增加芯片尺寸。