公开(公告)号：US20170243749A1

公开(公告)日：2017-08-24

申请号：US15049152

申请日：2016-02-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chueh-Yang Liu ,  Chun-Wei Yu ,  Yu-Ying Lin ,  Yu-Ren Wang

IPC: H01L21/28 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L21/28185 ,  H01L21/28167 ,  H01L21/823462 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

Abstract: A method of forming an oxide layer is provided in the present invention. The method includes the following steps. A first oxide layer is formed on a semiconductor substrate, and a quality enhancement process is then performed to etch the first oxide layer and densify the first oxide layer at the same time for forming a second oxide layer. The first oxide layer is etched and densified at the same time by a mixture of dilute hydrofluoric acid (DHF) and hydrogen peroxide (H2O2) in the quality enhancement process. The thickness of the second oxide layer may be reduced and the quality of the second oxide layer may be enhanced by the quality enhancement process at the same time.

公开(公告)号：US09728397B1

公开(公告)日：2017-08-08

申请号：US15150444

申请日：2016-05-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Hsu Ting ,  Chun-Wei Yu ,  Chueh-Yang Liu ,  Yu-Ren Wang

IPC: H01L29/78 ,  H01L21/02 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/311

CPC classification number: H01L21/0206 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0657

Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes fin shaped structures and a recessed insulating layer. The fin shaped structures are disposed on a substrate. The recessed insulating layer covers a bottom portion of each of the fin shaped structures to expose a top portion of each of the fin shaped structures. The recessed insulating layer has a curve surface and a wicking structure is defined between a peak and a bottom of the curve surface. The wicking structure is disposed between the fin shaped structures and has a height being about 1/12 to 1/10 of a height of the top portion of the fin shaped structures.

公开(公告)号：US20170200824A1

公开(公告)日：2017-07-13

申请号：US15469569

申请日：2017-03-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Wei Yu ,  Hsu Ting ,  Chueh-Yang Liu ,  Yu-Ren Wang ,  Kuang-Hsiu Chen

IPC: H01L29/78 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/45 ,  H01L29/417

CPC classification number: H01L29/7845 ,  H01L21/02065 ,  H01L21/28123 ,  H01L21/823814 ,  H01L21/823828 ,  H01L21/823864 ,  H01L21/823871 ,  H01L23/535 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

Abstract: A semiconductor device includes: a substrate; a gate structure on the substrate; and an epitaxial layer in the substrate adjacent to the gate structure, in which the epitaxial layer includes a planar surface and protrusions adjacent to two sides of the planar surface. Preferably, a contact plug is embedded in part of the epitaxial layer, and a silicide is disposed under the contact plug, in which a bottom surface of the silicide includes an arc.