公开(公告)号：US06998313B2

公开(公告)日：2006-02-14

申请号：US10733626

申请日：2003-12-11

Applicant: Chi-Hui Lin

Inventor： Chi-Hui Lin

IPC: H01L21/336

CPC classification number: H01L27/11556 ,  H01L27/115 ,  H01L29/42336 ,  H01L29/7883

Abstract: A stacked gate flash memory device and method of fabricating the same. A cell of the stacked gate flash memory device is disposed in a cell trench within a substrate to achieve higher integration of memory cells.

公开(公告)号：US06753223B2

公开(公告)日：2004-06-22

申请号：US10295260

申请日：2002-11-15

Applicant: Chi-Hui Lin

Inventor： Chi-Hui Lin

IPC: H01L21336

CPC classification number: H01L29/66825 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/42324

Abstract: A method for fabricating a flash memory cell. The method starts with sequential formation of a first insulating layer, a first conductive layer and pad layer on a semiconductor substrate. Part of the pad layer is removed to form a first opening, followed by forming a conductive spacer, i.e. the tip, on the sidewalls of the first opening. Then, parts of the pad layer, first conductive layer, first insulating layer and substrate are removed to form a second opening. Next, a second insulating layer is formed to fill the first opening and the second opening to form a first gate insulating layer and shallow trench isolation. The first gate insulating layer is used as hard mask to remove part of the first conductive layer and the first insulating layer to form a floating gate and a second insulating layer. Tunneling oxide and control gate are then formed on the floating gate. Finally, a source/drain is formed.

Abstract translation: 一种制造闪存单元的方法。 该方法从在半导体衬底上顺序形成第一绝缘层，第一导电层和焊盘层开始。 去除衬垫层的一部分以形成第一开口，随后在第一开口的侧壁上形成导电间隔物，即尖端。 然后，去除衬垫层，第一导电层，第一绝缘层和衬底的一部分以形成第二开口。 接下来，形成第二绝缘层以填充第一开口和第二开口，以形成第一栅极绝缘层和浅沟槽隔离。 第一栅绝缘层用作硬掩模以去除部分第一导电层和第一绝缘层，以形成浮栅和第二绝缘层。 然后在浮动栅上形成隧道化氧化物和控制栅极。 最后，形成源极/漏极。

公开(公告)号：US5858835A

公开(公告)日：1999-01-12

申请号：US996193

申请日：1997-12-22

Applicant: Chi-Hui Lin

Inventor： Chi-Hui Lin

IPC: H01L21/02 ,  H01L21/8242

CPC classification number: H01L27/10852 ,  H01L28/84

Abstract: A method for fabricating a capacitor over a semiconductor substrate is disclosed. The method includes the steps of: forming an insulating layer over the semiconductor substrate; forming a contact opening through the insulating layer to expose a portion of the semiconductor substrate; forming a first polysilicon layer over the insulating layer and filling in the contact opening to electrically contact the semiconductor substrate; patterning the first polysilicon layer to the insulating layer surface, thereby forming a trench for defining a capacitor region; forming a thin polysilicon layer with a rugged surface over the first polysilicon layer and the insulating layer; forming a mask layer over the thin polysilicon layer, wherein the mask layer has a smaller thickness in the trench bottom than in other regions; removing the mask layer in the trench bottom through an anisotropical etch step; removing the uncovered portions of the thin polysilicon layer to expose the insulating layer surface; removing the mask layer, thereby forming a storage electrode consisting of the thin polysilicon layer and the first polysilicon layer; forming a dielectric layer over the storage electrode and the exposed insulating layer; and forming a second polysilicon layer over the dielectric layer.

Abstract translation: 公开了一种在半导体衬底上制造电容器的方法。 该方法包括以下步骤：在半导体衬底上形成绝缘层; 形成通过所述绝缘层的接触开口以暴露所述半导体衬底的一部分; 在所述绝缘层上形成第一多晶硅层，并填充所述接触开口以电接触所述半导体衬底; 将第一多晶硅层图案化成绝缘层表面，从而形成用于限定电容器区域的沟槽; 在所述第一多晶硅层和所述绝缘层上形成具有凹凸表面的薄多晶硅层; 在所述薄多晶硅层上形成掩模层，其中所述掩模层在所述沟槽底部具有比在其它区域更小的厚度; 通过各向异性热蚀刻步骤去除沟槽底部中的掩模层; 去除所述薄多晶硅层的未覆盖部分以暴露所述绝缘层表面; 去除掩模层，从而形成由薄多晶硅层和第一多晶硅层组成的存储电极; 在所述存储电极和所述暴露的绝缘层上形成介电层; 以及在所述电介质层上形成第二多晶硅层。

公开(公告)号：US20050156233A1

公开(公告)日：2005-07-21

申请号：US11076499

申请日：2005-03-09

Applicant: Chi-Hui Lin

Inventor： Chi-Hui Lin

IPC: H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/76 ,  H01L21/336

CPC classification number: H01L27/11556 ,  H01L27/115 ,  H01L29/42336 ,  H01L29/7883

Abstract: A stacked gate flash memory device and method of fabricating the same. A cell of the stacked gate flash memory device is disposed in a cell trench within a substrate to achieve higher integration of memory cells.

Abstract translation: 堆叠式栅极闪存器件及其制造方法。 层叠栅极闪存器件的单元被布置在衬底内的单元沟槽中，以实现存储单元的更高集成度。

公开(公告)号：US5872041A

公开(公告)日：1999-02-16

申请号：US933008

申请日：1997-09-18

Applicant: Ta-Yuan Lee ,  Chi-Hui Lin

Inventor： Ta-Yuan Lee ,  Chi-Hui Lin

IPC: H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/70

CPC classification number: H01L27/10852 ,  H01L27/10817 ,  H01L28/91

Abstract: A method for fabricating electrodes of a capacitor over a semiconductor substrate is disclosed. The method includes the steps of: forming a base insulating layer over the semiconductor substrate; forming a stacked layer, including an insulating layer and a mask layer, over the base insulating layer; defining the stacked layer to form an opening to the base insulating layer; forming a first conducting layer over the stacked layer; forming a spacer on the sidewall of the first conducting layer in the opening; etching the bottom of the opening by using the mask layer and the spacer as a mask to expose a portion of the semiconductor substrate; forming a second conducting layer in the opening to electrically connect the exposed semiconductor substrate; and removing the spacer to leave the first and the second conducting layers as a capacitor electrode.

Abstract translation: 公开了一种在半导体衬底上制造电容器的电极的方法。 该方法包括以下步骤：在半导体衬底上形成基极绝缘层; 在所述基底绝缘层上形成包括绝缘层和掩模层的层叠层; 限定所述堆叠层以形成到所述基底绝缘层的开口; 在堆叠层上形成第一导电层; 在所述开口中的所述第一导电层的侧壁上形成间隔物; 通过使用掩模层和间隔物作为掩模蚀刻开口的底部以暴露半导体衬底的一部分; 在所述开口中形成第二导电层以电连接所暴露的半导体衬底; 并且移除间隔物以将第一和第二导电层留作电容器电极。