公开(公告)号：US20200221968A1

公开(公告)日：2020-07-16

申请号：US16734264

申请日：2020-01-03

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Alessandro GUMIERO ,  Marco PASSONI ,  Luigi DELLA TORRE ,  Stefano ROSSI

IPC: A61B5/0408

Abstract: A wearable sensing device includes a connector socket provided with contact pads connectable to sensing electrodes for sensing biological electrical signals. A supply module is provided with a battery, which is housed in a first casing configured for reversible coupling with the connector socket. A control module is housed in a second casing distinct from the first casing and configured for coupling with the supply module and with the connector socket. The control module is equipped with a processing unit configured to process biological electrical signals detectable through the contact pads. Mechanical-connection members couple the supply module to the connector socket. Electrical-connection members distinct from the mechanical-connection members are configured to connect the battery and the contact pads to the control module.

公开(公告)号：US10715143B1

公开(公告)日：2020-07-14

申请号：US16271474

申请日：2019-02-08

Applicant: STMicroelectronics S.r.l.

Inventor： Agatino Antonino Alessandro ,  Carmelo Ardizzone

IPC: H03K19/003 ,  H03K19/007

Abstract: Disclosed herein is a circuit including first and second input circuits. The first input circuit is configured to receive first and second logic signals and to source current to first and second control nodes if at least one of the first and second logic signals is at a logic low. The second input circuit is configured to receive the first and second logic signals and to sink current from the first and second control nodes if at least one of the first and second logic signals is at a logic high. A first output circuit is configured to source current to an output node when current is sunk from the first control node. A second output circuit is configured to sink current from the output node when current is sourced to the second control node. A latch is coupled to the output node.

公开(公告)号：US20200221234A1

公开(公告)日：2020-07-09

申请号：US16813477

申请日：2020-03-09

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Fabrizio CERINI ,  Silvia ADORNO ,  Federico VERCESI

IPC: H04R17/02 ,  B81B3/00 ,  B81C1/00 ,  H01L41/113

Abstract: A piezoelectric MEMS transducer formed in a body of semiconductor material, which has a central axis and a peripheral area and comprises a plurality of beams, transverse to the central axis and having a first end, coupled to the peripheral area of the body, and a second end, facing the central axis; a membrane, transverse to the central axis and arranged underneath the plurality of beams; and a pillar, parallel to the central axis and rigid with the second end of the beams and to the membrane. The MEMS transducer further comprises a plurality of piezoelectric sensing elements arranged on the plurality of beams.

公开(公告)号：US20200220444A1

公开(公告)日：2020-07-09

申请号：US16239211

申请日：2019-01-03

Applicant: STMicroelectronics S.r.l.

Inventor： Lucio Renna

IPC: H02K41/03 ,  H02K11/33 ,  H02K15/02 ,  B25J9/10

Abstract: An artificial muscle fiber includes an external fiber and an internal fiber. The external fiber includes a first linear array of actuators having protrusions directed in a first direction. The internal fiber includes a second linear array of actuators having protrusions directed in a second direction opposite to the first direction. Protrusions of the first linear array of actuators and protrusions of the second linear array of actuators are separated by a non-zero gap, and each actuator of the first linear array of actuators and the second linear array of actuators includes a soft magnetic material.

公开(公告)号：US20200219799A1

公开(公告)日：2020-07-09

申请号：US16824429

申请日：2020-03-19

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Cristina SOMMA

IPC: H01L23/495 ,  H01L23/498

Abstract: One or more embodiments are directed to semiconductor packages and methods in which one or more electrical components are positioned between a semiconductor die and a surface of a substrate. In one embodiment, a semiconductor package includes a substrate having a first surface. One or more electrical components are electrically coupled to electrical contacts on the first surface of the substrate. A semiconductor die is positioned on the one or more electrical components, and the semiconductor die has an active surface that faces away from the substrate. An adhesive layer is on the first surface of the substrate and on the one or more electrical components, and the semiconductor die is spaced apart from the one or more electrical components by the adhesive layer. Wire bonds are provided that electrically couples the active surface of the semiconductor die to the substrate.

公开(公告)号：US10700220B2

公开(公告)日：2020-06-30

申请号：US16228483

申请日：2018-12-20

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Massimo Cataldo Mazzillo ,  Piero Fallica ,  Salvatore Lombardo

IPC: H01L31/107 ,  H01L31/0216 ,  H01L27/146 ,  G01J1/44 ,  H01L27/144 ,  H01L31/02

Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.

公开(公告)号：US10696597B2

公开(公告)日：2020-06-30

申请号：US15192648

申请日：2016-06-24

Applicant: STMicroelectronics S.R.L.

Inventor： Angela Cimmino ,  Giovanna Salzillo ,  Valeria Casuscelli ,  Andrea Di Matteo

IPC: C04B35/49 ,  C04B35/622 ,  C04B35/624 ,  C04B35/626 ,  C04B35/64 ,  C04B35/468 ,  C09D1/00 ,  C04B35/634 ,  C04B35/632 ,  C04B35/465 ,  C09D7/61 ,  C09D5/03

Abstract: The present disclosure relates to a precursor solution for the preparation of a ceramic of the BZT-αBXT type, where X is selected from Ca, Sn, Mn, and Nb, and α is a molar fraction selected in the range between 0.10 and 0.90, said solution comprising: 1) at least one barium precursor compound; 2) a precursor compound selected from the group consisting of at least one calcium compound, at least one tin compound, at least one manganese compound, and at least one niobium compound; 3) at least one anhydrous precursor compound of zirconium; 4) at least one anhydrous precursor compound of titanium; 5) a solvent selected from the group consisting of a polyol and mixtures of a polyol and a secondary solvent selected from the group consisting of alcohols, carboxylic acids, esters, ketones, ethers, and mixtures thereof; and 6) a chelating agent, as well as method of using the same.

公开(公告)号：US10680707B2

公开(公告)日：2020-06-09

申请号：US16412227

申请日：2019-05-14

Applicant: STMicroelectronics S.r.l.

Inventor： Luca Casone ,  Danilo Blasi ,  Andrea Piglione ,  Emile Saccani

IPC: H04B7/26 ,  H04J3/02 ,  H04J3/06 ,  H04B3/54 ,  H04L12/70

Abstract: A device includes an interface and Time Division Multiple Access (TDMA) Medium Access Control (MAC) circuitry coupled to the interface. The TDMA MAC circuitry detects a beacon in a frame having a defined frame duration and determines a frame compensation value based on a start time of the frame, a reference start time of the frame, and a number of elapsed frames. A current frame duration value is determined based on the frame compensation value and the defined frame duration.

公开(公告)号：US20200177083A1

公开(公告)日：2020-06-04

申请号：US16680084

申请日：2019-11-11

Applicant: STMicroelectronics S.r.l.

Inventor： Osvaldo Enrico Zambetti

IPC: H02M3/158 ,  G01R31/327

Abstract: A converter includes two switching stages coupled in series between positive and negative input terminals. A control circuit is configured for driving the switching stages based on an output voltage of the converter. A first switching stage includes two switches coupled in series between a positive input terminal and a first node. A capacitor and an inductor are coupled in series between the two switches and a positive output terminal. A third switch is coupled between a node between the capacitor and the inductor and the negative input terminal. A second capacitor is coupled between the first node and the negative input terminal. A second switching stage includes a second node coupled to the first node. Two additional electronic switches are coupled in series between the second node and the negative input terminal. A second inductor is coupled between the two additional switches and the positive output terminal.

公开(公告)号：US10674578B1

公开(公告)日：2020-06-02

申请号：US16584059

申请日：2019-09-26

Applicant: STMicroelectronics S.r.l.

Inventor： Ignazio Cala′ ,  Salvatore Pantano ,  Santi Carlo Adamo

IPC: G06F3/00 ,  H05B45/10 ,  H03K3/42 ,  H05B47/18 ,  G06F9/30 ,  G06F9/38

Abstract: A circuit includes: a communication interface configured to receive data; a plurality of output terminals; a bank of input registers coupled to the communication interface; a bank of buffer registers; a bank of output registers; a signal generator configured to generate a plurality of output signals based on respective registers of the bank of output registers at respective output terminals; and a conversion stage configured to: when data is received by the bank of input registers from the communication interface, sequentially convert content of the input registers of the bank of input registers and store the converted content into corresponding buffer registers of the bank of buffer registers based on a conversion function, and when the conversion stage finishes storing the converted content into the buffer registers, simultaneously copy content from the buffer registers into corresponding output registers of the bank of output registers.