公开(公告)号：US11728893B1

公开(公告)日：2023-08-15

申请号：US17161200

申请日：2021-01-28

Applicant: Acacia Communications, Inc.

Inventor： Michael Sluyski

IPC: H04B10/40 ,  H04L69/22 ,  H04L47/20 ,  H04L47/6275 ,  H04L47/6295 ,  H04L47/32

CPC classification number: H04B10/40 ,  H04L47/20 ,  H04L47/32 ,  H04L47/6275 ,  H04L47/6295 ,  H04L69/22

Abstract: A method, system, and apparatus for parsing incoming frames; classifying the frames by information contained in a header of the ethernet frame; and performing an action on the classification.

公开(公告)号：US11698658B1

公开(公告)日：2023-07-11

申请号：US17833306

申请日：2022-06-06

Applicant: Acacia Communications, Inc.

Inventor： Gavin Allen ,  Ian Dedic ,  Bo Yang ,  Tarun Gupta

IPC: G06F1/10 ,  H03K3/037

CPC classification number: G06F1/10 ,  H03K3/037

Abstract: A method system, and apparatus for adjusting skew in a circuit comprising feeding an input clock into a first push-pull source follower stage, feeding an inverse of an input clock bar into a first CMOS inverter stage, creating an output clock based on an equal contribution of the input clock of the first push-pull follower stage and the inverse of the input clock bar of the first CMOS invert stage, feeding the input clock bar into a first push-pull source follower stage, feeding an inverse of the input clock into a first CMOS inverter stage, and creating an output clock based on an equal contribution of the input clock bar of the first push-pull follower stage and the inverse of the input clock bar of the first CMOS invert stage.

公开(公告)号：US11606156B1

公开(公告)日：2023-03-14

申请号：US16857584

申请日：2020-04-24

Applicant: Acacia Communications, Inc.

Inventor： James Duda ,  Jon Stahl ,  Kevin Hinchey

IPC: H04B10/00 ,  H04J3/06 ,  H03L7/081 ,  H04L43/106

Abstract: A method, system, and apparatus for determining delay between clocks, in response to a trigger event, buffering DSP symbol information in a symbol capture buffer; wherein the amount of DSP symbol information buffered corresponds to the amount of symbols captured during a buffer storage interval; and extracting a synchronization packet from the symbol capture buffer.

公开(公告)号：US11543850B1

公开(公告)日：2023-01-03

申请号：US16777968

申请日：2020-01-31

Applicant: Acacia Communications, Inc.

Inventor： Ian Dedic ,  Gavin Allen ,  David Enright ,  Bo Yang ,  Tarun Gupta

IPC: G06F1/08 ,  H03B5/12 ,  H03F3/50

Abstract: An apparatus and system for a clock buffer. The clock buffer comprises a source follower, and the source follower comprises a voltage source and a resistor.

公开(公告)号：US11287676B1

公开(公告)日：2022-03-29

申请号：US17092393

申请日：2020-11-09

Applicant: Acacia Communications, Inc.

Inventor： Christopher Doerr

IPC: G02F1/025 ,  G02F1/01 ,  G02F1/225 ,  G02F1/015 ,  G02F1/21

Abstract: In an embodiment, a method and apparatus for increasing bandwidth of an optical modulator by applying a first voltage applied to a beginning of a resistive line and applying a second voltage applied to an end of the resistive line; wherein the first voltage is less than the second voltage.

公开(公告)号：US20220011507A1

公开(公告)日：2022-01-13

申请号：US17373576

申请日：2021-07-12

Applicant: Acacia Communications, Inc.

Inventor： Li Chen ,  Long Chen ,  Christopher Doerr

IPC: G02B6/122 ,  G02B6/136

Abstract: In part, in one aspect, the disclosure relates to a method for passivating a waveguide of an optical circuit. The method includes etching a suspended waveguide in the optical circuit; the suspended waveguide having a top surface, a bottom surface, and side surfaces; and covering the top surface and side surfaces of the suspended waveguide with a passivation coating having a thickness that ranges from between about 10 nm to about 20 nm. In one embodiment, the method further includes removing one or more coatings from a portion of the optical circuit. The disclosure also relates to various passivated optical silicon circuit embodiments.

公开(公告)号：US11221447B1

公开(公告)日：2022-01-11

申请号：US16794759

申请日：2020-02-19

Applicant: Acacia Communications, Inc.

Inventor： Long Chen ,  Christopher Doerr ,  Li Chen

IPC: G02B6/30

Abstract: Cantilevered waveguides suspended above an air cavity in an underlying substrate are described. The waveguide is formed by patterning a waveguide layer in some embodiments, and the air cavity is formed by etching the substrate beneath the waveguide. The topside of the air cavity may be sealed by filling the openings used to etch the cavity with a sealant, such as optical epoxy. In some embodiments, the waveguide is a facet coupler, positioned at a chip facet.

公开(公告)号：US20210320724A1

公开(公告)日：2021-10-14

申请号：US17357344

申请日：2021-06-24

Applicant: Acacia Communications, Inc.

Inventor： Jonas Geyer

IPC: H04B10/61 ,  H04B10/516

Abstract: A method, system, and apparatus enabled to selectively choose a baud rate for communication of optical data using a modem enabled to operate with an optical signal modulated at plurality of finely tuned baud rates.

公开(公告)号：US11115250B1

公开(公告)日：2021-09-07

申请号：US16804140

申请日：2020-02-28

Applicant: Acacia Communications, Inc.

Inventor： Timo Pfau

IPC: H04L25/49 ,  H04B10/516 ,  H04B10/524

Abstract: A method, system, and apparatus for calculating coefficients for inputs and corresponding output sequences for a pulse-position modulation encoder using a stored structure; wherein the structure is a subset of the values of Pascal's Triangle.

公开(公告)号：US11114815B1

公开(公告)日：2021-09-07

申请号：US15851185

申请日：2017-12-21

Applicant: Acacia Communications, Inc.

Inventor： Li Chen ,  Christopher Doerr

IPC: H01S3/23 ,  H01S3/067 ,  H01S3/16 ,  H01S3/094

Abstract: A method and apparatus for a silicon photonics chip and a rare-earth-ion-doped waveguide amplifier chip, wherein the rare-earth ion-doped waveguide amplifier is proximate to and optically coupled to the silicon photonics chip.