High Refresh Rate Displays with Synchronized Local Dimming
    52.
    发明申请
    High Refresh Rate Displays with Synchronized Local Dimming 有权
    高刷新率显示同步本地调光

    公开(公告)号:US20170053610A1

    公开(公告)日:2017-02-23

    申请号:US14828849

    申请日:2015-08-18

    Applicant: Apple Inc.

    Abstract: A display may have a first stage such as a color liquid crystal display stage and a second stage such as a monochromatic liquid crystal display stage that are coupled in tandem so that light from a backlight passes through both stages. The first (upper) stage may be a high resolution display panel that is operated at a first refresh rate while the second (lower) stage is a low resolution display panel that is operated at a second refresh rate that is greater than the first refresh rate. In particular, the second stage may be configured to provide localized dimming that is synchronized to one or more moving objects in the video frames to be displayed to help reduce the perceived motion blur. The localized dimming may be provided via insertion of a black image portion that only overlaps with the moving objects, a blanking row that tracks the moving objects, a black frame, etc.

    Abstract translation: 显示器可以具有第一级,例如彩色液晶显示级和第二级,例如单色液晶显示级,其串联耦合,使得来自背光的光通过两级。 第一(上)级可以是以第一刷新率操作的高分辨率显示面板,而第二(下)级是低于第一刷新率的第二刷新率操作的低分辨率显示面板 。 特别地,第二级可以被配置为提供与要显示的视频帧中的一个或多个移动对象同步的局部调光,以帮助减少感知到的运动模糊。 可以通过插入仅与移动物体重叠的黑色图像部分,跟踪移动物体的消隐行,黑色帧等来提供局部调光。

    Organic Light-Emitting Diode Displays with Silicon and Semiconducting Oxide Thin-Film Transistors
    53.
    发明申请
    Organic Light-Emitting Diode Displays with Silicon and Semiconducting Oxide Thin-Film Transistors 有权
    具有硅和半导体氧化物薄膜晶体管的有机发光二极管显示器

    公开(公告)号:US20160307988A1

    公开(公告)日:2016-10-20

    申请号:US14854367

    申请日:2015-09-15

    Applicant: Apple Inc.

    CPC classification number: H01L27/3265 H01L27/3248 H01L27/3262

    Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. The silicon transistors may be configured in a top gate arrangement. The oxide transistors may be configured in a top gate or a bottom gate arrangement. In one embodiment, source-drain contacts for the silicon and oxide transistors may be formed simultaneously. In another embodiment, the silicon and oxide thin-film transistor structures may be formed using at least three metal routing layers.

    Abstract translation: 电子设备可以包括在基板上具有显示像素阵列的显示器。 显示像素可以是液晶显示器中的有机发光二极管显示像素或显示像素。 在有机发光二极管显示器中,可以形成包括半导体氧化物薄膜晶体管,硅薄膜晶体管和电容器结构的混合薄膜晶体管结构。 电容器结构可以与半导体氧化物薄膜晶体管重叠。 硅晶体管可以配置在顶栅极配置中。 氧化物晶体管可以配置在顶栅极或底栅极配置中。 在一个实施例中,可以同时形成用于硅和氧化物晶体管的源极 - 漏极接触。 在另一个实施例中,硅和氧化物薄膜晶体管结构可以使用至少三个金属布线层形成。

    Third metal layer for thin film transistor with reduced defects in liquid crystal display
    55.
    发明授权
    Third metal layer for thin film transistor with reduced defects in liquid crystal display 有权
    用于薄膜晶体管的第三金属层具有降低液晶显示器的缺陷

    公开(公告)号:US09001297B2

    公开(公告)日:2015-04-07

    申请号:US13752612

    申请日:2013-01-29

    Applicant: Apple Inc.

    Abstract: A liquid crystal display (LCD) includes an array of pixels over a thin film transistor (TFT) substrate. The TFT substrate includes a TFT that has a first metal layer to form a gate electrode and a second metal layer to form a source electrode and a drain electrode for each pixel. The LCD also includes an organic insulation layer disposed over the TFT substrate, where the organic insulator layer has trenches on a top surface. The LCD further includes a third metal layer disposed over the organic insulation layer in the trenches, the trenches having a trench depth at least equal to the thickness of the third metal layer. The LCD also includes a passivation layer over the third metal layer, and a pixel electrode for each pixel over the passivation layer. The LCD further includes a polymer layer over the pixel electrode, and liquid molecules on the polymer layer.

    Abstract translation: 液晶显示器(LCD)包括薄膜晶体管(TFT)衬底上的像素阵列。 TFT基板包括具有形成栅电极的第一金属层和形成用于每个像素的源电极和漏电极的第二金属层的TFT。 LCD还包括设置在TFT基板上的有机绝缘层,其中有机绝缘体层在顶表面上具有沟槽。 LCD还包括设置在沟槽中的有机绝缘层之上的第三金属层,沟槽的沟槽深度至少等于第三金属层的厚度。 LCD还包括在第三金属层上的钝化层,以及在钝化层上的每个像素的像素电极。 LCD还包括像素电极上方的聚合物层和聚合物层上的液体分子。

    Gate insulator loss free etch-stop oxide thin film transistor
    56.
    发明授权
    Gate insulator loss free etch-stop oxide thin film transistor 有权
    栅极绝缘体无损蚀刻 - 停止氧化物薄膜晶体管

    公开(公告)号:US08987049B2

    公开(公告)日:2015-03-24

    申请号:US14474433

    申请日:2014-09-02

    Applicant: Apple Inc.

    Abstract: A method is provided for fabricating a thin-film transistor (TFT). The method includes forming a semiconductor layer over a gate insulator that covers a gate electrode, and depositing an insulator layer over the semiconductor layer, as well as etching the insulator layer to form a patterned etch-stop without losing the gate insulator. The method also includes forming a source electrode and a drain electrode over the semiconductor layer and the patterned etch-stop. The method further includes removing a portion of the semiconductor layer beyond the source electrode and the drain electrode such that a remaining portion of the semiconductor layer covers the gate insulator in a first overlapping area of the source electrode and the gate electrode and a second overlapping area of the drain electrode and gate electrode.

    Abstract translation: 提供了制造薄膜晶体管(TFT)的方法。 该方法包括在覆盖栅电极的栅极绝缘体上形成半导体层,以及在半导体层上沉积绝缘体层,以及蚀刻绝缘体层以形成图案化蚀刻停止件,而不会失去栅极绝缘体。 该方法还包括在半导体层和图案化蚀刻停止物上形成源电极和漏电极。 该方法还包括:除了源电极和漏电极之外的半导体层的一部分,使得半导体层的剩余部分在源电极和栅电极的第一重叠区域和第二重叠区域中覆盖栅极绝缘体 的漏电极和栅电极。

    Gate Insulator Loss Free Etch-Stop Oxide Thin Film Transistor
    57.
    发明申请
    Gate Insulator Loss Free Etch-Stop Oxide Thin Film Transistor 有权
    栅极绝缘体无损蚀刻刻蚀氧化物薄膜晶体管

    公开(公告)号:US20140042427A1

    公开(公告)日:2014-02-13

    申请号:US13629537

    申请日:2012-09-27

    Applicant: APPLE INC.

    Abstract: A method is provided for fabricating a thin-film transistor (TFT). The method includes forming a semiconductor layer over a gate insulator that covers a gate electrode, and depositing an insulator layer over the semiconductor layer, as well as etching the insulator layer to form a patterned etch-stop without losing the gate insulator. The method also includes forming a source electrode and a drain electrode over the semiconductor layer and the patterned etch-stop. The method further includes removing a portion of the semiconductor layer beyond the source electrode and the drain electrode such that a remaining portion of the semiconductor layer covers the gate insulator in a first overlapping area of the source electrode and the gate electrode and a second overlapping area of the drain electrode and gate electrode.

    Abstract translation: 提供了制造薄膜晶体管(TFT)的方法。 该方法包括在覆盖栅电极的栅极绝缘体上形成半导体层,以及在半导体层上沉积绝缘体层,以及蚀刻绝缘体层以形成图案化蚀刻停止件,而不会失去栅极绝缘体。 该方法还包括在半导体层和图案化蚀刻停止物上形成源电极和漏电极。 该方法还包括:除了源电极和漏电极之外的半导体层的一部分,使得半导体层的剩余部分在源电极和栅电极的第一重叠区域和第二重叠区域中覆盖栅极绝缘体 的漏电极和栅电极。

    GATE LINE DRIVER CIRCUIT FOR DISPLAY ELEMENT ARRAY
    58.
    发明申请
    GATE LINE DRIVER CIRCUIT FOR DISPLAY ELEMENT ARRAY 有权
    用于显示元件阵列的门极线驱动电路

    公开(公告)号:US20130235003A1

    公开(公告)日:2013-09-12

    申请号:US13661839

    申请日:2012-10-26

    Applicant: APPLE INC.

    CPC classification number: G09G3/3677

    Abstract: Gate line driver circuitry applies an output pulse to each of several gate lines for a display element array. The circuitry has a number of gate drivers each being coupled to drive a respective one of the gate lines. Each of the gate drivers has an output stage in which a high side transistor and a low side transistor are coupled to drive the respective gate line, responsive to at least one clock signal. A pull down transistor is coupled to discharge a control electrode of the output stage. A control circuit having a cascode amplifier is coupled to drive the pull down transistor as a function of a) at least one clock signal and b) feedback from the control electrode. Other embodiments are also described and claimed.

    Abstract translation: 栅极线驱动器电路将输出脉冲施加到用于显示元件阵列的多个栅极线中的每一个。 电路具有多个栅极驱动器,每个栅极驱动器被耦合以驱动相应的一条栅极线。 每个栅极驱动器具有输出级,其中高侧晶体管和低侧晶体管耦合以响应于至少一个时钟信号驱动相应的栅极线。 耦合下拉晶体管以放电输出级的控制电极。 具有共源共栅放大器的控制电路被耦合以作为a)至少一个时钟信号和b)来自控制电极的反馈来驱动下拉晶体管。 还描述和要求保护其他实施例。

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