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    Pixel array antialiasing to accommodate curved display edges
    2.
    发明授权
    Pixel array antialiasing to accommodate curved display edges 有权

    公开(公告)号：US10409118B1

    公开(公告)日：2019-09-10

    申请号：US15498356

    申请日：2017-04-26

    Applicant: Apple Inc.

    Inventor： Pei-En Chang ,  Szu-Hsien Lee ,  Hsin-Ying Chiu ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Hossein Nemati

    IPC: G02F1/1343 ,  G02F1/1335 ,  G02F1/1333 ,  H01L27/32 ,  G02F1/133

    Abstract: An electronic device may have a housing and a display in the housing. The display may have one or more curved edges such as curved edges associated with rounded corners in the display and housing. The display may have an array of pixels. The display may include full-strength pixels and may have a band of antialiasing pixels having selectively reduced strengths to visually smooth content displayed along the curved edges. The pixels may be organic light-emitting diode pixels, liquid crystal display pixels, or other display pixels. Organic light-emitting diode pixels may have drive transistors and associated organic light-emitting diodes. Selectively elevated series or opaque light blocking structures of selectively reduced areas may be used to selectively reduce the strength of the antialiasing pixels. Liquid crystal display pixels may include electrodes of different shapes and/or opaque layer openings of different sizes to form antialiasing pixels in desired patterns.

    Display gate driver circuits with dual pulldown transistors
    3.
    发明授权
    Display gate driver circuits with dual pulldown transistors 有权

    公开(公告)号：US10037738B2

    公开(公告)日：2018-07-31

    申请号：US14862071

    申请日：2015-09-22

    Applicant: Apple Inc.

    Inventor： Rungrot Kitsomboonloha ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Szu-Hsien Lee

    IPC: G09G3/36 ,  G09G3/3225 ,  G09G3/20

    CPC classification number: G09G3/3674 ,  G09G3/20 ,  G09G3/3225 ,  G09G3/3648 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0291

    Abstract: A display is provided that includes an array of display pixels and gate driver circuitry for providing data and gate line signals to the display pixels. Gate driver circuitry may include gate driver circuits that generate the gate line signals. A gate driver circuit may include at least a buffer transistor, a bootstrapping capacitor coupled to the buffer transistor, a pulldown transistor coupled in series with the buffer transistor, and an isolation transistor coupled to the gate of the pulldown transistor. The buffer transistor may directly receive a first clock signal, whereas the isolation transistor may directly receive a second clock signal that is complementary to the first clock signal. The pulldown transistor is substantially larger than the buffer transistor. The buffer transistor is substantially larger than the isolation transistor. Configured as such, clock loading is minimized while the pulldown transistor is sized to provide the desired fall time performance.

    High refresh rate displays with synchronized local dimming
    4.
    发明授权
    High refresh rate displays with synchronized local dimming 有权

    公开(公告)号：US09984638B2

    公开(公告)日：2018-05-29

    申请号：US14828849

    申请日：2015-08-18

    Applicant: Apple Inc.

    Inventor： Byung Duk Yang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Young-Jik Jo

    IPC: G09G3/36

    CPC classification number: G09G3/3648 ,  G09G3/3611 ,  G09G2300/023 ,  G09G2320/103 ,  G09G2340/0435

    Abstract: A display may have a first stage such as a color liquid crystal display stage and a second stage such as a monochromatic liquid crystal display stage that are coupled in tandem so that light from a backlight passes through both stages. The first (upper) stage may be a high resolution display panel that is operated at a first refresh rate while the second (lower) stage is a low resolution display panel that is operated at a second refresh rate that is greater than the first refresh rate. In particular, the second stage may be configured to provide localized dimming that is synchronized to one or more moving objects in the video frames to be displayed to help reduce the perceived motion blur. The localized dimming may be provided via insertion of a black image portion that only overlaps with the moving objects, a blanking row that tracks the moving objects, a black frame, etc.

    Display Gate Driver Circuits with Dual Pulldown Transistors
    6.
    发明申请
    Display Gate Driver Circuits with Dual Pulldown Transistors 审中-公开
    显示具有双下拉晶体管的栅极驱动器电路

    公开(公告)号：US20170004790A1

    公开(公告)日：2017-01-05

    申请号：US14862071

    申请日：2015-09-22

    Applicant: Apple Inc.

    Inventor： Rungrot Kitsomboonloha ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Szu-Hsien Lee

    IPC: G09G3/36 ,  G09G3/32

    CPC classification number: G09G3/3674 ,  G09G3/20 ,  G09G3/3225 ,  G09G3/3648 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0291

    Abstract: A display is provided that includes an array of display pixels and gate driver circuitry for providing data and gate line signals to the display pixels. Gate driver circuitry may include gate driver circuits that generate the gate line signals. A gate driver circuit may include at least a buffer transistor, a bootstrapping capacitor coupled to the buffer transistor, a pulldown transistor coupled in series with the buffer transistor, and an isolation transistor coupled to the gate of the pulldown transistor. The buffer transistor may directly receive a first clock signal, whereas the isolation transistor may directly receive a second clock signal that is complementary to the first clock signal. The pulldown transistor is substantially larger than the buffer transistor. The buffer transistor is substantially larger than the isolation transistor. Configured as such, clock loading is minimized while the pulldown transistor is sized to provide the desired fall time performance.

    Abstract translation: 提供了一种显示器，其包括用于向显示像素提供数据和栅极线信号的显示像素阵列和栅极驱动器电路。 栅极驱动器电路可以包括产生栅极线信号的栅极驱动器电路。 栅极驱动器电路可以包括至少缓冲晶体管，耦合到缓冲晶体管的自举电容器，与缓冲晶体管串联耦合的下拉晶体管，以及耦合到下拉晶体管的栅极的隔离晶体管。 缓冲晶体管可以直接接收第一时钟信号，而隔离晶体管可以直接接收与第一时钟信号互补的第二时钟信号。 下拉晶体管实质上大于缓冲晶体管。 缓冲晶体管基本上大于隔离晶体管。 如此配置，时钟负载最小化，而下拉晶体管的尺寸设置为提供所需的下降时间性能。

    Liquid Crystal Displays With Minimized Transmission Loss and Enhanced Off-Axis Color Fidelity
    7.
    发明申请
    Liquid Crystal Displays With Minimized Transmission Loss and Enhanced Off-Axis Color Fidelity 有权
    具有最小化传输损耗和增强的离轴色彩保真度的液晶显示器

    公开(公告)号：US20160209691A1

    公开(公告)日：2016-07-21

    申请号：US14850006

    申请日：2015-09-10

    Applicant: Apple Inc.

    Inventor： Byung Duk Yang ,  Chia Hsuan Tai ,  Hiroshi Osawa ,  Kyung Wook Kim ,  Ming-Chin Hung ,  Shang-Chih Lin ,  Shih Chang Chang ,  Yu Cheng Chen ,  Yuan Chen

    IPC: G02F1/1368 ,  H01L29/51 ,  H01L29/786 ,  G02F1/1335 ,  G02F1/1362

    CPC classification number: G02F1/1368 ,  G02B6/00 ,  G02F1/133345 ,  G02F1/13338 ,  G02F1/133514 ,  G02F1/133528 ,  G02F1/1362 ,  G02F1/136209 ,  G02F2001/133521 ,  G02F2001/136222 ,  H01L29/518 ,  H01L29/78606

    Abstract: A display may have upper and lower display layers. A layer of liquid crystal material may be interposed between the upper and lower display layers. The display layers may have substrates. The display layers may include a color filter layer having an array of color filter elements on a glass substrate and a thin-film transistor layer having a layer of thin-film transistor circuitry on a glass substrate. Dielectric layers within the display layers such as dielectric layers within the thin-film transistor layer may have differing indices of refraction. Reflections and color shifts due to index of refraction discontinuities may be minimized by interposing graded index dielectric layers between adjacent layers with different indices. The graded index layers may be formed from structures with a continuously varying index of refraction or structures with a step-wise varying index of refraction.

    Abstract translation: 显示器可以具有上和下显示层。 可以在上显示层和下显示层之间插入一层液晶材料。 显示层可以具有基底。 显示层可以包括在玻璃基板上具有滤色器元件阵列的滤色器层和在玻璃基板上具有薄膜晶体管电路层的薄膜晶体管层。 诸如薄膜晶体管层内的介电层的显示层内的电介质层可以具有不同的折射率。 由于折射不连续指数引起的反射和颜色偏移可以通过在不同指数的相邻层之间插入渐变折射率介电层来最小化。 渐变折射率层可以由具有连续变化的折射率的结构或具有逐步变化的折射率的结构形成。

    RC matching in a touch screen
    8.
    发明授权
    RC matching in a touch screen 有权
    RC触摸屏匹配

    公开(公告)号：US09367188B2

    公开(公告)日：2016-06-14

    申请号：US14286718

    申请日：2014-05-23

    Applicant: Apple Inc.

    Inventor： Szu-Hsien Lee ,  Byung Duk Yang ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang

    IPC: G06F3/044

    CPC classification number: G06F3/044 ,  G06F3/0416 ,  Y10T29/49107

    Abstract: A touch screen. In some examples, the touch screen can comprise a first element coupled to a first sense connection, and a second element coupled to a second sense connection. In some examples, the first and second sense connections can be configured such that a load presented by the first sense connection and the first element is substantially equal to a load presented by the second sense connection and the second element. In some examples, the first and second sense connections can comprise detour routing configured such that a resistance of the first sense connection is substantially equal to a resistance of the second sense connection. In some examples, the first and second sense connections can be coupled to dummy routing configured such that a first capacitance presented by the first sense connection is substantially equal to a second capacitance presented by the second sense connection.

    Abstract translation: 触摸屏。 在一些示例中，触摸屏可以包括耦合到第一感测连接的第一元件和耦合到第二感测连接的第二元件。 在一些示例中，第一和第二感测连接可以被配置为使得由第一感测连接和第一元件呈现的负载基本上等于由第二感测连接和第二元件呈现的负载。 在一些示例中，第一和第二感测连接可以包括被配置为使得第一感测连接的电阻基本上等于第二感测连接的电阻的迂回路由。 在一些示例中，第一感测连接和第二感测连接可以耦合到伪路由，其被配置为使得由第一感测连接呈现的第一电容基本上等于由第二感测连接呈现的第二电容。

    Displays With Logos and Alignment Marks
    9.
    发明申请
    Displays With Logos and Alignment Marks 审中-公开
    显示标志和对齐标记

    公开(公告)号：US20140098332A1

    公开(公告)日：2014-04-10

    申请号：US13648404

    申请日：2012-10-10

    Applicant: APPLE INC.

    Inventor： Kyung Wook Kim ,  Cheng Chen ,  Shih Chang Chang ,  Young Bae Park ,  John Z. Zhong

    IPC: G02F1/1335 ,  G02F1/1339

    Abstract: An electronic device may be provided with a display mounted in a housing. The display may include a color filter layer, a liquid crystal layer, and a thin-film transistor layer. The color filter layer may form the outermost layer of the display. A color filter layer substrate in the color filter layer may have opposing inner and outer surfaces. A layer of patterned metal on the inner surface may form metal alignment marks. The metal alignment marks may include alignment marks for color filter elements, alignment marks for a black matrix layer that is formed on top of the color filter elements, and post spacer alignment marks. The layer of patterned metal may also form structures such as logo structures that are visible on the outer surface in an inactive border region of the display.

    Abstract translation: 电子设备可以设置有安装在壳体中的显示器。 显示器可以包括滤色器层，液晶层和薄膜晶体管层。 滤色器层可以形成显示器的最外层。 滤色器层中的滤色器层基板可以具有相对的内表面和外表面。 内表面上的图案化金属层可以形成金属对准标记。 金属对准标记可以包括用于滤色器元件的对准标记，形成在滤色器元件顶部的黑矩阵层的对准标记和柱间隔物对准标记。 图案化金属层还可以形成诸如在显示器的非活动边界区域中的外表面上可见的标志结构的结构。

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