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51.
公开(公告)号:US20130111236A1
公开(公告)日:2013-05-02
申请号:US13282947
申请日:2011-10-27
申请人: Avinash N. Ananthakrishnan , Efraim Rotem , Doron Rajwan , Jeremy J. Shrall , Eric C. Samson , Eliezer Wiessman , Ryan Wells
发明人: Avinash N. Ananthakrishnan , Efraim Rotem , Doron Rajwan , Jeremy J. Shrall , Eric C. Samson , Eliezer Wiessman , Ryan Wells
IPC分类号: G06F1/32
CPC分类号: G06F1/324 , G06F1/26 , G06F1/30 , G06F1/3203 , G06F1/3234 , G06F1/3243 , G06F13/14 , Y02D10/126
摘要: In one embodiment, the present invention includes a method for determining that a non-core domain of a multi-domain processor is not operating at a frequency requested by the non-core domain, sending a request from the non-core domain to a power controller to reduce a frequency of a core domain of the multi-domain processor, and responsive to the request, reducing the core domain frequency. Other embodiments are described and claimed.
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公开(公告)号:US20130111226A1
公开(公告)日:2013-05-02
申请号:US13285414
申请日:2011-10-31
申请人: Avinash N. Ananthakrishnan , Efraim Rotem , Doron Rajwan , Eliezer Wiessman , Ryan Wells , Nadav Shulman
发明人: Avinash N. Ananthakrishnan , Efraim Rotem , Doron Rajwan , Eliezer Wiessman , Ryan Wells , Nadav Shulman
IPC分类号: G06F1/00
CPC分类号: G06F1/3206 , G06F1/26 , G06F1/324 , G06F1/3243 , G06F1/3287 , G06F9/3885 , Y02D10/126 , Y02D10/152 , Y02D10/171
摘要: In one embodiment, the present invention includes a multicore processor with a power controller to control a frequency at which the processor operates. More specifically, the power controller can limit a maximum operating frequency of the processor to less than a configured maximum operating frequency to enable a reduction in a number of frequency transitions occurring responsive to power state events, thus avoiding the overhead of operations performed in handling such transitions. Other embodiments are described and claimed.
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53.
公开(公告)号:US20130111121A1
公开(公告)日:2013-05-02
申请号:US13285465
申请日:2011-10-31
申请人: Avinash N. Ananthakrishnan , Efraim Rotem , Eliezer Wiessman , Doron Rajwan , Nadav Shulman , Alon Naveh , Hisham Abu-Salah
发明人: Avinash N. Ananthakrishnan , Efraim Rotem , Eliezer Wiessman , Doron Rajwan , Nadav Shulman , Alon Naveh , Hisham Abu-Salah
CPC分类号: G06F1/3275 , G06F1/28 , G06F1/3287 , G06F12/0802 , G06F12/084 , G06F12/0848 , G06F12/0864 , G06F2212/1028 , G06F2212/282 , G06F2212/502 , G06F2212/621 , Y02D10/13
摘要: In one embodiment, the present invention is directed to a processor having a plurality of cores and a cache memory coupled to the cores and including a plurality of partitions. The processor can further include a logic to dynamically vary a size of the cache memory based on a memory boundedness of a workload executed on at least one of the cores. Other embodiments are described and claimed.
摘要翻译: 在一个实施例中,本发明涉及具有多个核心的处理器和耦合到核心并且包括多个分区的高速缓冲存储器。 处理器还可以包括基于在至少一个核上执行的工作负载的存储器有界性来动态地改变高速缓存存储器的大小的逻辑。 描述和要求保护其他实施例。
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公开(公告)号:US20120254641A1
公开(公告)日:2012-10-04
申请号:US13077618
申请日:2011-03-31
IPC分类号: G06F1/32
CPC分类号: G06F1/30 , G06F1/28 , G06F1/3243 , G06F11/004 , G06F11/3024 , G06F11/3058 , G06F11/348 , G06F2201/81 , G06F2201/86 , Y02D10/152
摘要: An apparatus may comprise one or more processor cores of a processor and a set of current limiters. Each current limiter may be coupled to a respective processor core and arranged to monitor processor activity in the processor, to compare the processor activity to one or more current limits of multiple current limits; and to initiate a current-limiting action when the one or more current limits is exceeded.
摘要翻译: 设备可以包括处理器的一个或多个处理器核心和一组限流器。 每个限流器可以耦合到相应的处理器核心并且被布置成监视处理器中的处理器活动,以将处理器活动与多个电流限制的一个或多个电流限制进行比较; 并且当超过一个或多个电流限制时启动限流动作。
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公开(公告)号:US20100083009A1
公开(公告)日:2010-04-01
申请号:US12242000
申请日:2008-09-30
申请人: Efraim Rotem , Dan Baum , Doron Rajwan , Omer Vikinski , Ronny Korner , Kosta Luria
发明人: Efraim Rotem , Dan Baum , Doron Rajwan , Omer Vikinski , Ronny Korner , Kosta Luria
IPC分类号: G06F1/00
CPC分类号: G06F1/3203
摘要: Methods, apparatuses, and systems for managing power of a processing unit are described herein. Some embodiments include determining a voltage variation of a subset of current components of a current consumed by a processing unit. Other embodiments include detecting architectural events on a processing core of the processing unit and instituting various actions to reduce an input rate of instructions to the core. Other embodiments may be described and claimed.
摘要翻译: 本文描述了用于管理处理单元的功率的方法,装置和系统。 一些实施例包括确定由处理单元消耗的电流的当前分量的子集的电压变化。 其他实施例包括检测处理单元的处理核心上的架构事件并且建立各种动作以减少对核心的指令的输入速率。 可以描述和要求保护其他实施例。
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公开(公告)号:US07327761B2
公开(公告)日:2008-02-05
申请号:US10343541
申请日:2001-08-01
申请人: Doron Rajwan , Eyal Lubetzky , Joseph Yossi Azar
发明人: Doron Rajwan , Eyal Lubetzky , Joseph Yossi Azar
IPC分类号: H04L12/00
CPC分类号: H04L1/0007 , H04L1/0002 , H04L1/007 , H04L1/0083 , H04L1/1877 , H04L65/4076 , H04L65/602 , H04L65/80 , Y02D50/10
摘要: A method of streaming data, comprising: receiving an input stream of data, at a transmitter; dividing the input stream into a plurality of blocks, at least one of which blocks is incomplete; generating a plurality of first packets based on at least one block of data; generating at least one second packet from at least one as yet incomplete block of data; said block comprising recently received data; transmitting said at least one first packet and at least one second packet to a receiver that can reconstruct said stream from said first packets and said second packets, said transmitting utilizing a differential protocol by which different parts of the data are transmitted at different rates, so that a receiver can join the transmission at any time and start receiving the data at a minimum delay; and generating at least one third packet from said at least one incomplete block; said at least one third packet being based at least in part on data received subsequent to data forming the basis for the at least one second packet; wherein said at least one second packet is transmitted at a higher rate than mandated by said protocol to compensate for a later repeated transmission of information carried in said at least one second packet at a lower rate than mandated by the protocol, once said at least one third packet is generated and transmitted.
摘要翻译: 一种流数据的方法,包括:在发射机处接收数据的输入流; 将输入流分成多个块,其中至少一个块不完整; 基于至少一个数据块生成多个第一分组; 从至少一个仍然不完整的数据块生成至少一个第二分组; 所述块包括最近接收的数据; 将所述至少一个第一分组和至少一个第二分组发送到可以从所述第一分组和所述第二分组重建所述流的接收机,所述传输利用差分协议,以不同速率传输数据的不同部分,因此 接收机可以随时加入传输,并以最小延迟开始接收数据; 以及从所述至少一个不完整块生成至少一个第三分组; 所述至少一个第三分组至少部分地基于在形成所述至少一个第二分组的基础的数据之后接收的数据; 其中所述至少一个第二分组以比所述协议强制的更高的速率被传输,以补偿在所述至少一个第二分组中以比该协议强制的更低的速率承载的信息的后续重复传输,一旦所述至少一个 生成和传输第三个数据包。
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