Stand-alone data driven type information processor
    51.
    发明授权
    Stand-alone data driven type information processor 失效
    独立数据驱动型信息处理器

    公开(公告)号:US5696920A

    公开(公告)日:1997-12-09

    申请号:US789691

    申请日:1997-01-27

    IPC分类号: G06F9/44 G06F9/445 G06F15/82

    CPC分类号: G06F9/4436 G06F9/445

    摘要: A data driven type information processor includes a data driven type information processing unit, and a download unit. The information processing unit includes a program storing unit and an input/output control unit of a data packet for storing information stored in a data packet including a load instruction into the program storing unit and for carrying out a data driven type process on data packets including other instructions according to information stored in the program storing unit. The download unit downloads program data to the information processing unit by applying a data packet including the load instruction and program data to be stored in the program storing unit. The download unit includes a memory for storing program data, a readout circuit for reading out a set of program data stored in the memory, and a packet generation circuit for generating a data packet including the load instruction and readout program data to provide the same to the input/output control unit of the information processing unit. The memory may store a plurality of sets of program data.

    摘要翻译: 数据驱动型信息处理器包括数据驱动型信息处理单元和下载单元。 信息处理单元包括程序存储单元和数据分组的输入/输出控制单元,用于存储存储在包括程序存储单元的加载指令的数据分组中的信息,并且对数据分组执行数据驱动类型处理,包括 根据存储在程序存储单元中的信息的其他指令。 下载单元通过应用包含要存储在程序存储单元中的加载指令和程序数据的数据分组将程序数据下载到信息处理单元。 下载单元包括用于存储程序数据的存储器,用于读出存储在存储器中的一组程序数据的读出电路,以及用于产生包括加载指令和读出程序数据的数据分组的分组生成电路,以将其提供给 信息处理单元的输入/输出控制单元。 存储器可以存储多组节目数据。

    Memory interface apparatus for carrying out complex operation processing
    52.
    发明授权
    Memory interface apparatus for carrying out complex operation processing 失效
    用于执行复杂操作处理的存储器接口装置

    公开(公告)号:US5502834A

    公开(公告)日:1996-03-26

    申请号:US215564

    申请日:1994-03-22

    CPC分类号: G09G5/393

    摘要: A memory interface apparatus includes: a pipeline register holding a data packet from a transmission path to provide an instruction code, a generation number, and data separately; a memory access unit accessing an image memory according to the instruction code, a circuit latching the output of the image memory; an ALU carrying out an operation specified by the instruction code from the pipeline register between data from the pipeline register and the output of the latch circuit for output of the operation result; a selector responsive to a select signal for selecting one of data from the pipeline register and the output of the ALU to apply the selected result to the image memory as data; an output unit generating a data packet including a result of a series of complex operation carried out by the pipeline register, the image memory, and the ALU for output; a transmission control unit controlling transmission of a data packet on the transmission path carried out by the pipeline register and the output unit; and a control unit responsive to the instruction code from the pipeline register for controlling the ALU, the memory access unit, the image memory, the latch circuit, the selector, the output unit, and the transmission control unit so that a series of complex operation processing including an access to the image memory specified by the instruction code is carried out.

    摘要翻译: 存储器接口装置包括:流水线寄存器,其保存来自传输路径的数据分组以分别提供指令代码,生成号和数据; 存储器访问单元,根据指令代码访问图像存储器;锁存图像存储器的输出的电路; ALU在来自流水线寄存器的数据和锁存电路的输出之间从流水线寄存器指定的指令执行操作,以输出操作结果; 响应于选择信号的选择器,用于从流水线寄存器选择数据中的一个和ALU的输出,以将所选择的结果作为数据应用于图像存储器; 产生包括由流水线寄存器,图像存储器和ALU执行的一系列复杂操作的结果的数据分组的输出单元,用于输出; 传输控制单元,控制由流水线寄存器和输出单元执行的传输路径上的数据分组的传输; 以及控制单元,其响应来自流水线寄存器的指令代码来控制ALU,存储器存取单元,图像存储器,锁存电路,选择器,输出单元和传输控制单元,使得一系列复杂操作 执行包括对由指令代码指定的图像存储器的访问的处理。

    Conveyor mechanism for cylindrical articles
    53.
    发明授权
    Conveyor mechanism for cylindrical articles 失效
    圆柱形物品的输送机构

    公开(公告)号:US4416368A

    公开(公告)日:1983-11-22

    申请号:US400055

    申请日:1982-07-20

    IPC分类号: A24C5/35 B65G15/14 B65G15/42

    摘要: A conveyor mechanism for transferring cylindrical articles, such as, cigarettes embodies a single belt conveyor which does the conveying from a lower level to a higher level. The surface used for conveyance has a curved portion unlike belt conveyors in general use and a plurality of pins project from at least one side of the belt in parallel relation to each other. At the curved section, these pins are held by a suitable means such that the belt maintains the curvature. Cigarettes or other cylindrical objects are fed by the internal surface of the curving belt and an auxiliary belt conveyor.

    摘要翻译: 用于转移诸如香烟的圆柱形物品的输送机构体现了单一的带式输送机,该输送机将输送从较低的水平进行到较高的水平。 用于输送的表面具有与通常使用的带式输送机不同的弯曲部分,并且多个销彼此平行地从带的至少一侧突出。 在弯曲部分,这些销被适当的装置保持,使得皮带保持曲率。 香烟或其他圆柱形物体由弯曲带的内表面和辅助带式输送机供给。

    Method of producing yoke of rotary electric machine
    54.
    发明授权
    Method of producing yoke of rotary electric machine 失效
    旋转电机磁轭制作方法

    公开(公告)号:US4389871A

    公开(公告)日:1983-06-28

    申请号:US206180

    申请日:1980-11-12

    CPC分类号: B21K1/76 B21K21/12 H02K15/02

    摘要: A method of producing a yoke of a rotary electric machine wherein a cylindrical blank is formed comprises extrusion forming a semi-finished article having abutting surfaces at axial opposite ends in the first step. The abutting surfaces are subjected to coining in the second step whereby the two abutting surfaces can have a spacing interval of high accuracy and can be disposed parallel to each other.

    摘要翻译: 一种制造旋转电机的轭的方法,其中形成圆柱形坯料包括在第一步骤中在轴向相对端处挤出形成具有邻接表面的半成品。 在第二步骤中,邻接表面经受压印,由此两个邻接表面可以具有高精度的间隔间隔并且可以彼此平行设置。

    Self-synchronous FIFO memory device
    55.
    发明授权
    Self-synchronous FIFO memory device 失效
    自同步FIFO存储器件

    公开(公告)号:US07463640B2

    公开(公告)日:2008-12-09

    申请号:US10636698

    申请日:2003-08-08

    IPC分类号: H04L12/28

    摘要: A self-synchronous FIFO memory device (100) has a structure in which n self-synchronous data transmission lines (111-11n) are arrayed in parallel. An input control section (101) selects one of the n self-synchronous data transmission lines, and mediates the reception and delivery of a first transfer request signal, a first acknowledge (transfer instruction) signal and data between the selected self-synchronous data transmission line and a self-synchronous data transmission line of a preceding-stage section. Further, an output control section (102) selects one of the n self-synchronous data transmission lines, and mediates the reception and delivery of a second transfer request signal, a second acknowledge (transfer instruction) signal and data between the selected self-synchronous data transmission line and a self-synchronous data transmission line of a succeeding-stage section.

    摘要翻译: 自同步FIFO存储装置(100)具有并行排列n个自同步数据传输线(111〜11n)的结构。 输入控制部(101)选择n个自同步数据传输线中的一个,并且调停第一传送请求信号的接收和发送,第一确认(传送指令)信号和所选择的自同步数据传输之间的数据 线路和前级段的自同步数据传输线路。 此外,输出控制部(102)选择n个自同步数据传输线中的一个,并且调停第二传送请求信号的接收和传送,第二确认(传送指令)信号和所选择的自同步 数据传输线和后级段的自同步数据传输线。

    Data transmission line used continuously connected in plurality of stages in asynchronous system
    56.
    发明授权
    Data transmission line used continuously connected in plurality of stages in asynchronous system 失效
    数据传输线在异步系统中连续多级连续使用

    公开(公告)号:US06882695B1

    公开(公告)日:2005-04-19

    申请号:US09138578

    申请日:1998-08-24

    CPC分类号: G06F7/00 G06F5/08

    摘要: A data transmission line used connected continuously in a plurality of stages in an asynchronous system includes a transfer control circuit, synchronous and asynchronous data holding circuits and a timing adjustment circuit. The data transmission line receives and holds data transmitted from a data transmission line of a preceding stage or data output from an external clock synchronous circuit, and outputs and transmits the data to a data transmission line of a succeeding stage. Timing adjustment circuit adjusts data input timing by the transfer control circuit to the synchronous and asynchronous data holding circuits so that data can surely be taken in. It becomes possible to surely take in and transmit data output from external synchronous system in an asynchronous data transmission line at a desired arbitrary timing.

    摘要翻译: 异步系统中的多级连续使用的数据传输线包括传输控制电路,同步和异步数据保持电路以及定时调整电路。 数据传输线接收并保持从前级的数据传输线发送的数据或从外部时钟同步电路输出的数据,并将数据输出并发送到后级的数据传输线。 定时调整电路通过传输控制电路将数据输入定时调整到同步和异步数据保持电路,以确保数据的可靠性。在异步数据传输线路中可以可靠地接收和发送外部同步系统输出的数据 在期望的任意时刻。

    Apparatus for and method of converting sampling frequency of digital signals

    公开(公告)号:US06373410B1

    公开(公告)日:2002-04-16

    申请号:US09826889

    申请日:2001-04-06

    IPC分类号: H03M700

    摘要: An input port receives input data X, generates input packets by adding generation numbers and node numbers indicative of prescribed destinations, in the order of reception, and in addition, generates a data packet from a separately input clock signal. The input data packet is written to an image memory using the generation number in the packet as an address signal, or read from the image memory using the generation number in the data packet as an address signal. Operation is performed in accordance with the input data packet or the data packet read from the image memory by a memory interface, and the processed data packet is output to the outside of a data driven engine, a memory interface or a data driven type processor.

    Image operation processing apparatus storing discrete data efficiently in a memory and operating method thereof
    58.
    发明授权
    Image operation processing apparatus storing discrete data efficiently in a memory and operating method thereof 失效
    图像操作处理设备将离散数据有效地存储在存储器中及其操作方法中

    公开(公告)号:US06317817B1

    公开(公告)日:2001-11-13

    申请号:US09078491

    申请日:1998-05-14

    IPC分类号: G06F1200

    摘要: An image operation processing apparatus is connected to a memory. The apparatus processes, by accessing the memory, a data packet including instruction information and an address of a prescribed address space. The apparatus realizes an address translation process for translating the address included in an incoming data packet to an address of a partial address space smaller than the prescribed address space. It further realizes a memory access process for accessing the memory in accordance with the address translated by the address translation process. Finally, it performs a process in accordance with the instruction information included in the data packet.

    摘要翻译: 图像操作处理装置连接到存储器。 该装置通过访问存储器来处理包括指令信息和规定地址空间的地址的数据分组。 该装置实现地址转换处理,用于将输入数据分组中包含的地址转换为小于规定地址空间的部分地址空间的地址。 它进一步实现了根据地址转换过程转换的地址访问存储器的存储器访问过程。 最后,根据数据包中包含的指示信息进行处理。

    Data driven information processor
    59.
    发明授权
    Data driven information processor 失效
    数据驱动信息处理器

    公开(公告)号:US5794065A

    公开(公告)日:1998-08-11

    申请号:US646075

    申请日:1996-05-07

    CPC分类号: G06F9/4436

    摘要: A data driven information processor capable of readily performing appropriate processing to input data according to their meanings includes a data packet forming portion forming a data packet having a tag including a generation number, a destination number, instruction information and a constant value based on externally input data. The data packet forming portion includes a generation number generation processing portion for generating a multi-dimensional generation number to be added to input data based on an order of the data and a destination number generation processing portion for generating a tag as a function of a generation number generated by the generation number generation processing portion. One of a generation number operation processing portion performing operation for each dimension of a generation number and a copy processing portion copying a portion of a generation number into a destination number, or both of these processing portions, may also be provided.

    摘要翻译: 能够容易地进行根据其含义输入数据的适当处理的数据驱动信息处理器包括数据分组形成部分,其形成具有标签的数据分组,该数据分组具有基于外部输入的生成号码,目的地号码,指令信息和常数值 数据。 数据分组形成部分包括:生成数生成处理部分,用于根据数据的顺序生成要添加到输入数据的多维生成数,以及用于生成作为生成的函数的标签的目的地编号生成处理部 号码生成处理部。 还可以提供一代码操作处理部分中的一个编号操作处理部分,用于对代号的每个维进行操作,以及复制处理部分将一部分生成号码复制到目的地号码中,或者这两个处理部分中的一个。

    Data driven type information processor suitable for image processing
that utilizes a configuration condition
    60.
    发明授权
    Data driven type information processor suitable for image processing that utilizes a configuration condition 失效
    适用于利用配置条件的图像处理的数据驱动型信息处理器

    公开(公告)号:US5748933A

    公开(公告)日:1998-05-05

    申请号:US463767

    申请日:1995-06-05

    CPC分类号: G06F9/4436 G06T1/20

    摘要: Function processor FP of a data driven type information processor includes mechanism A receiving plural field generation number GN (representing pixel coordinate information), instruction code OPC, and condition X determining a divisional configuration of the generation number. Mechanism A takes out a bit field designated by instruction code OPC and/or the condition from applied generation number GN. Data of the taken out bit field is sent to arithmetic and logic unit A. Arithmetic and logic unit A carries out operation between data of the bit field and right data R-DATA. The operation result is sent to mechanism B. Mechanism B receives instruction code OPC, generation number GN, and condition X determining a divisional configuration of the generation number. The above described operation result is stored in the bit field of generation number GN designated by instruction code OPC and/or condition X.

    摘要翻译: 数据驱动型信息处理器的功能处理器FP包括接收多个字段生成数GN(表示像素坐标信息),指令代码OPC的机构A以及确定代数的分割配置的条件X. 机制A取出由指令代码OPC指定的位字段和/或来自应用的产生号GN的条件。 取出位字段的数据被发送到算术和逻辑单元A.算术和逻辑单元A在位字段的数据和右数据R-DATA之间执行操作。 操作结果被发送到机构B.机制B接收指令代码OPC,产生号GN,以及确定生成号的分割配置的条件X. 上述操作结果存储在由指令代码OPC和/或条件X指定的代数GN的位域中。