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公开(公告)号:US20240014904A1
公开(公告)日:2024-01-11
申请号:US18471139
申请日:2023-09-20
Applicant: Ayar Labs, Inc.
Inventor: Chen Sun , Roy Edward Meade , Mark Wade , Alexandra Wright , Vladimir Stojanovic , Rajeev Ram , Milos Popovic , Derek Van Orden , Michael Davenport
IPC: H04B10/50 , H01S5/40 , H01S5/026 , H04B10/80 , H01S5/02325
CPC classification number: H04B10/504 , H01S5/4012 , H01S5/4087 , H01S5/0268 , H04B10/801 , H04B10/506 , H01S5/02325 , H01S5/02476
Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.
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公开(公告)号:US11867944B2
公开(公告)日:2024-01-09
申请号:US17701072
申请日:2022-03-22
Applicant: Ayar Labs, Inc.
Inventor: Roy Edward Meade , Chen Sun , Shahab Ardalan , John Fini , Forrest Sedgwick
CPC classification number: G02B6/12004 , G01M11/31 , G02B6/13 , H01L22/20 , H01L22/30 , G02B2006/12107 , G02B2006/12121 , G02B2006/12145 , G02B2006/12147 , G02B2006/12164
Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.
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公开(公告)号:US11822119B2
公开(公告)日:2023-11-21
申请号:US18168555
申请日:2023-02-13
Applicant: Ayar Labs, Inc.
Inventor: John Fini , Vladimir Stojanovic , Chen Sun , Derek van Orden , Mark Taylor Wade
CPC classification number: G02B6/12019 , G02B6/125 , G02B6/12016 , G02B6/29335 , G02B6/43 , G02B2006/12107 , G02F2203/15 , H04B10/25
Abstract: An electro-optical chip includes an optical input port, an optical output port, and an optical waveguide having a first end optically connected to the optical input port and a second end optically connected to the optical output port. The optical waveguide includes one or more segments. Different segments of the optical waveguide extends in either a horizontal direction, a vertical direction, a direction between horizontal and vertical, or a curved direction. The electro-optical chip also includes a plurality of optical microring resonators is positioned along at least one segment of the optical waveguide. Each microring resonator of the plurality of optical microring resonators is optically coupled to a different location along the optical waveguide. The electro-optical chip also includes electronic circuitry for controlling a resonant wavelength of each microring resonator of the plurality of optical microring resonators.
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公开(公告)号:US11799554B2
公开(公告)日:2023-10-24
申请号:US17866482
申请日:2022-07-16
Applicant: Ayar Labs, Inc.
Inventor: Chen Sun , Roy Edward Meade , Mark Wade , Alexandra Wright , Vladimir Stojanovic , Rajeev Ram , Milos Popovic , Derek Van Orden , Michael Davenport
CPC classification number: H04B10/504 , H01S5/0268 , H01S5/02325 , H01S5/4012 , H01S5/4087 , H04B10/506 , H04B10/801 , G02B6/42 , H01S5/02476 , H01S5/50
Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.
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公开(公告)号:US11705972B2
公开(公告)日:2023-07-18
申请号:US17583967
申请日:2022-01-25
Applicant: Ayar Labs, Inc.
Inventor: Roy Edward Meade , Vladimir Stojanovic , Chen Sun , Mark Wade , Hugo Saleh , Charles Wuischpard
CPC classification number: H04B10/80 , G02B6/4249 , G02B6/4274 , G11C5/04 , G11C5/06 , G11C5/141 , G11C11/42 , H04B10/516
Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.
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公开(公告)号:US20230224047A1
公开(公告)日:2023-07-13
申请号:US18152461
申请日:2023-01-10
Applicant: Ayar Labs, Inc.
Inventor: Matthew Sysak , Chen Sun , Shahab Ardalan , Daniel Jeong , Songtao Liu
IPC: H04B10/80
CPC classification number: H04B10/806
Abstract: An optical power supply includes a plurality of lasers in a laser array. Each of the plurality of lasers is configured to generate a separate beam of continuous wave laser light. The optical power supply includes a temperature sensor that acquires a temperature associated with the laser array. The optical power supply includes a digital controller that receives notification of the temperature from the temperature senor. The optical power supply includes an optical power adjuster controlled by the digital controller. The optical power adjuster adjusts an optical power level of one or more beams of continuous wave laser light generated by the plurality of lasers to produce an optical power encoding that conveys information about the temperature associated with the laser array as acquired by the temperature sensor. An electro-optic chip receives the beams of continuous wave laser light from the optical power supply and decodes the optical power encoding.
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公开(公告)号:US11563506B2
公开(公告)日:2023-01-24
申请号:US17410443
申请日:2021-08-24
Applicant: Ayar Labs, Inc.
Inventor: Vladimir Stojanovic , Alexandra Wright , Chen Sun , Mark Wade , Roy Edward Meade
Abstract: A TORminator module is disposed with a switch linecard of a rack. The TORminator module receives downlink electrical data signals from a rack switch. The TORminator module translates the downlink electrical data signals into downlink optical data signals. The TORminator module transmits multiple subsets of the downlink optical data signals through optical fibers to respective SmartDistributor modules disposed in respective racks. Each SmartDistributor module receives multiple downlink optical data signals through a single optical fiber from the TORminator module. The SmartDistributor module demultiplexes the multiple downlink optical data signals and distributes them to respective servers. The SmartDistributor module receives multiple uplink optical data signals from multiple servers and multiplexes them onto a single optical fiber for transmission to the TORminator module. The TORminator module coverts the multiple uplink optical data signals to multiple uplink electrical data signals, and transmits the multiple uplink electrical data signals to the rack switch.
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公开(公告)号:US11424830B2
公开(公告)日:2022-08-23
申请号:US17014665
申请日:2020-09-08
Applicant: Ayar Labs, Inc.
Inventor: Chen Sun , Roy Edward Meade , Mark Wade , Alexandra Wright , Vladimir Stojanovic , Rajeev Ram , Milos Popovic , Derek Van Orden
IPC: G02B6/12 , H04B10/50 , H01S5/40 , H01S5/026 , H04J14/02 , H01S5/02325 , H01S5/50 , H01S5/024 , H01S4/00
Abstract: A laser module includes a laser source and an optical marshalling module. The laser source is configured to generate and output a plurality of laser beams. The plurality of laser beams have different wavelengths relative to each other. The different wavelengths are distinguishable to an optical data communication system. The optical marshalling module is configured to receive the plurality of laser beams from the laser source and distribute a portion of each of the plurality of laser beams to each of a plurality of optical output ports of the optical marshalling module, such that all of the different wavelengths of the plurality of laser beams are provided to each of the plurality of optical output ports of the optical marshalling module. An optical amplifying module can be included to amplify laser light output from the optical marshalling module and provide the amplified laser light as output from the laser module.
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公开(公告)号:US20220214497A1
公开(公告)日:2022-07-07
申请号:US17701072
申请日:2022-03-22
Applicant: Ayar Labs, Inc.
Inventor: Roy Edward Meade , Chen Sun , Shahab Ardalan , John Fini , Forrest Sedgwick
Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.
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公开(公告)号:US20220148627A1
公开(公告)日:2022-05-12
申请号:US17583967
申请日:2022-01-25
Applicant: Ayar Labs, Inc.
Inventor: Roy Edward Meade , Vladimir Stojanovic , Chen Sun , Mark Wade , Hugo Saleh , Charles Wuischpard
Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.
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