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公开(公告)号：US11837802B2
公开(公告)日：2023-12-05
申请号：US16973636
申请日：2019-09-26
Inventor： Jie Wu , Tienlun Ting , Xiangzhong Kong , Xue Cao , Ying Wang , Liang Li , Haocheng Jia , Peizhi Cai , Chuncheng Che
Abstract: A liquid crystal antenna unit and a liquid crystal phased array antenna are provided. The liquid crystal antenna unit includes: a first substrate, a second substrate opposite to the first substrate, a liquid crystal layer between the first substrate and the second substrate, a transmission line on a first surface and extending in a first direction along the first surface, a first antenna oscillator on the first surface and arranged as an elongated dipole extending in a second direction along the first surface, a second antenna oscillator on a surface of the second substrate distal to the first substrate and at a position corresponding to the first antenna oscillator, and a ground electrode on a surface of the first substrate distal to the second substrate.
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52.发明授权公开(公告)号：US11688942B2
公开(公告)日：2023-06-27
申请号：US17467693
申请日：2021-09-07
Inventor： Ying Wang , Tienlun Ting , Jie Wu , Haocheng Jia , Liang Li , Cuiwei Tang , Qiangqiang Li , Wei Zhang , Meng Wei , Hao Liu , Chuncheng Che
CPC classification number: H01Q3/36 , H01Q9/0471 , H01Q13/02 , H01Q13/06
Abstract: The present disclosure provides an antenna, an antenna device, a fabricating method of the antenna, and a fabricating method of the antenna device, and relates to the field of antenna technology. The antenna includes a first substrate; a base material layer on the first substrate and having a plurality of antenna cavities arranged in an array therein; and a conductive layer on an inner side of each of the plurality of antenna cavities, each of the plurality of antenna cavities and the conductive layer on the inner side thereof forming an antenna unit, wherein each of the plurality of antenna cavities includes a first opening, and an aperture of the first opening at a position of the antenna cavity close to the first substrate is smaller than an aperture of the first opening at a position of the antenna cavity away from the first substrate.
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公开(公告)号：US11686984B2
公开(公告)日：2023-06-27
申请号：US17585863
申请日：2022-01-27
Inventor： Liqing Liao , Hongmin Li , Silin Feng , Ying Wang , Fengjing Tang
IPC: G02F1/1368 , G02F1/1362
CPC classification number: G02F1/136286 , G02F1/1368
Abstract: An array substrate and a reflective display substrate are disclosed. The array substrate includes a base, and a plurality of data lines and a plurality of sub-pixels that are disposed on the base. The sub-pixel includes a reflective pixel electrode and a TFT. An orthographic projection of the pixel electrode in each sub-pixel on the base is overlapped with orthographic projections of a first electrode, a first data line and a second data line.
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公开(公告)号：US11569557B2
公开(公告)日：2023-01-31
申请号：US17332539
申请日：2021-05-27
Inventor： Cuiwei Tang , Tienlun Ting , Ying Wang , Jie Wu , Haocheng Jia , Liang Li , Qiangqiang Li , Wei Zhang , Meng Wei , Chuncheng Che
Abstract: There is provided a substrate integrated waveguide filter having a central region and a peripheral region surrounding the central region, and including: a first substrate; a second substrate opposite to the first substrate; a plurality of conductive support pillars between the first substrate and the second substrate, within the peripheral region, and surrounding the central region, wherein a distance between at least one pair of adjacent two of the plurality of conductive support pillars is less than a wavelength of an electromagnetic wave to be transmitted by the substrate integrated waveguide filter; and a dielectric layer between the first substrate and the second substrate, wherein a permittivity of the dielectric layer is configured to be changed as a strength of an electric field formed between the first substrate and the second substrate is changed to adjust a frequency of the substrate integrated waveguide filter.
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公开(公告)号：US11450972B2
公开(公告)日：2022-09-20
申请号：US16640619
申请日：2019-06-27
Inventor： Ying Wang , Tienlun Ting , Xiangzhong Kong , Jie Wu , Liang Li , Peizhi Cai , Chuncheng Che , Hao Liu
Abstract: Embodiments of the present disclosure provide a power distribution network, a liquid crystal antenna including the power distribution network, and a communication device including the liquid crystal antenna. The power distribution network is configured to be used in a liquid crystal antenna and includes a plurality of cascaded power distributors. Each of the plurality of cascaded power distributors comprises a first microstrip line, a transmission medium region and a reference electrode. A tangent value of a dielectric loss angle of a transmission medium in the transmission medium region is smaller than a tangent value of a dielectric loss angle of a liquid crystal in the liquid crystal antenna.
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Patent Agency Ranking
公开(公告)号：US11373576B2
公开(公告)日：2022-06-28
申请号：US16337135
申请日：2018-09-21
Inventor： Silin Feng , Li Sun , Ying Wang
Abstract: The present application provides a shift register and a method of driving the same, and a gate driving circuit. In the shift register, an input sub-circuit is configured to output an input signal to a pull-up node under control of a first clock signal of a first clock signal terminal, an output sub-circuit is configured to output a second clock signal of a second clock signal terminal to the output terminal under control of a voltage level of the pull-up node, a reset sub-circuit is configured to reset voltage levels of the pull-up node and the output terminal under control of a voltage level of a pull-down node, and a reset control sub-circuit is configured to control the voltage level of the pull-down node such that the voltage levels of the pull-up node and the output terminal are reset to a level signal.
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57.发明申请公开(公告)号：US20210366350A1
公开(公告)日：2021-11-25
申请号：US16331745
申请日：2018-06-13
Inventor： Wei Xue , Hongmin Li , Fengjing Tang , Ying Wang
IPC: G09G3/20
Abstract: The present disclosure is related to a shift register circuit. The shift register circuit may include a shift output circuit and N driving output circuits. N is an integer larger than 1. Among the N driving output circuits, an i-th driving output circuit may be respectively coupled to an i-th driving clock signal terminal of N driving clock signal terminals, a pull-up node of the shift output circuit, and an i-th driving output terminal of N driving output terminals. The i-th driving output circuit may be configured to input an i-th driving clock signal from the i-th driving, clock signal terminal to the i-th driving output terminal under a control of the pull-up node, wherein i is a positive integer not greater than N.
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公开(公告)号：US10923007B2
公开(公告)日：2021-02-16
申请号：US16504419
申请日：2019-07-08
Inventor： Ying Wang , Meng Li , Wei Xue , Hongmin Li
Abstract: The present disclosure relates to the field of display technologies and provides a shift register unit. The shift register unit includes an input circuit, a pull-up circuit, an output circuit, an auxiliary circuit, a pull-down circuit, a first storage capacitor, and a second storage capacitor. The auxiliary circuit is coupled to a first clock signal terminal, a second clock signal terminal, an input terminal and a first output terminal. The second storage capacitor is coupled between a first node and a pull-up node.
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公开(公告)号：US10720118B2
公开(公告)日：2020-07-21
申请号：US16008698
申请日：2018-06-14
Inventor： Ying Wang , Meng Li , Xun Pu , Hongmin Li
Abstract: Embodiments of the present disclosure provide a shift register and a driving method thereof and a gate driving circuit. The shift register comprises an inputting circuit, a first outputting circuit, and a second outputting circuit. The first outputting circuit may comprise a first pulling-up sub-circuit, a first outputting sub-circuit, a first pulling-down sub-circuit, and a switching sub-circuit. A controlling terminal of switching sub-circuit is coupled to a controlling terminal of the first pulling-up sub-circuit. An inputting terminal of the switching sub-circuit is coupled to the outputting terminal of a first outputting sub-circuit. The second outputting circuit may comprise a second pulling-up sub-circuit, a second outputting sub-circuit, and a second pulling-down sub-circuit. An inputting terminal of the second pulling-up sub-circuit is coupled to an outputting terminal of the switching sub-circuit. A controlling terminal of the second outputting sub-circuit is coupled to an outputting terminal of the second pulling-up sub-circuit.
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60.发明申请公开(公告)号：US20190251887A1
公开(公告)日：2019-08-15
申请号：US16114545
申请日：2018-08-28
Inventor： Wei Xue , Jian Tao , Hongmin Li , Ying Wang
CPC classification number: G09G3/20 , G09G2300/0809 , G09G2310/0286 , G09G2310/08 , G11C19/287
Abstract: The embodiments of the present application disclose a shift register unit and a method for driving the same, a gate driving circuit and a method for driving the same, and a display apparatus. The shift register unit comprises an input sub-circuit connected to an input signal terminal and a pull-up control node, and configured to charge the pull-up control node under control of an input signal; and an output sub-circuit connected to the pull-up control node, a clock signal terminal, a first voltage terminal, and an output signal terminal, and configured to output a first constant voltage to the output signal terminal under control of a clock signal and the pull-up control node.
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