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    Organic light emitting device
    52.
    发明授权
    Organic light emitting device 有权
    有机发光装置

    公开(公告)号：US08525160B2

    公开(公告)日：2013-09-03

    申请号：US13137162

    申请日：2011-07-25

    Applicant: Chang-Ho Lee ,  Se-Jin Cho ,  Il-Soo Oh ,  Hee-Joo Ko ,  Hyung-Jun Song ,  Jin-Young Yun ,  Jong-Hyuk Lee

    Inventor： Chang-Ho Lee ,  Se-Jin Cho ,  Il-Soo Oh ,  Hee-Joo Ko ,  Hyung-Jun Song ,  Jin-Young Yun ,  Jong-Hyuk Lee

    IPC: H01L35/24

    CPC classification number: H01L51/5048 ,  H01L51/0052 ,  H01L51/0059 ,  H01L51/0077 ,  H01L51/508

    Abstract: An organic light-emitting device including a substrate; a first electrode; a second electrode; an emission layer; a first electron transport layer; a second electron transport layer; a third electron transport layer; and a hole transport layer, wherein the first electron transporting material has an electron mobility smaller than an electron mobility of the second electron transporting material at an electric field of 800 to 1000 V/cm, the second electron transporting material and the third electron transporting material each independently have an electron mobility of about 10−8 to about 10 cm2/V·s at an electric field of 800 to 1000 V/cm, and the third electron transport layer has an electron injection barrier of about 0.2 eV or less at an interface between the third electron transport layer and the second electrode.

    Abstract translation: 一种有机发光装置，包括：基板; 第一电极; 第二电极; 发射层; 第一电子传输层; 第二电子传输层; 第三电子传输层; 和空穴传输层，其中第一电子传输材料在800至1000V / cm的电场下具有小于第二电子传输材料的电子迁移率的电子迁移率，第二电子传输材料和第三电子传输材料 在800〜1000V / cm的电场下，各自独立地具有约10-8至约10cm 2 / V·s的电子迁移率，并且第三电子传输层的电子注入势垒在约0.2eV以下 第三电子传输层和第二电极之间的界面。

    Analog-to-digital converter with a resolution booster
    53.
    发明授权
    Analog-to-digital converter with a resolution booster 失效
    具有分辨率增强器的模数转换器

    公开(公告)号：US08471748B2

    公开(公告)日：2013-06-25

    申请号：US13104810

    申请日：2011-05-10

    Applicant: Yunseo Park ,  Jaejoon Kim ,  Chang-Ho Lee

    Inventor： Yunseo Park ,  Jaejoon Kim ,  Chang-Ho Lee

    IPC: H03M1/14

    CPC classification number: H03M1/145 ,  H03M1/468 ,  H03M1/52

    Abstract: An analog-to-digital converter with a resolution booster is provided. The analog-to-digital converter may include a successive approximation analog-to-digital converter, a resolution booster, and an output combiner. The successive approximation analog-to-digital converter may be configured to convert an analog signal into digital data. The resolution booster may be selectively activated to enhance the resolution of the successive approximation analog-to-digital converter, and the output combiner may be configured to combine the respective outputs of the successive approximation analog-to-digital converter and the resolution booster.

    Abstract translation: 提供了具有分辨率增强器的模数转换器。 模拟 - 数字转换器可以包括逐次逼近模数转换器，分辨率增强器和输出组合器。 逐次逼近模数转换器可以被配置为将模拟信号转换成数字数据。 可以选择性地激活分辨率升压器以增强逐次逼近模数转换器的分辨率，并且输出组合器可以被配置为组合逐次逼近模数转换器和分辨率增强器的相应输出。

    Systems and methods for adaptive bias circuits for a power amplifier
    54.
    发明授权
    Systems and methods for adaptive bias circuits for a power amplifier 有权
    用于功率放大器的自适应偏置电路的系统和方法

    公开(公告)号：US08378749B1

    公开(公告)日：2013-02-19

    申请号：US13194270

    申请日：2011-07-29

    Applicant: Woonyun Kim ,  Jeonghu Han ,  Ki Seok Yang ,  Jae Joon Chang ,  Chang-Ho Lee

    Inventor： Woonyun Kim ,  Jeonghu Han ,  Ki Seok Yang ,  Jae Joon Chang ,  Chang-Ho Lee

    IPC: H03F3/45

    CPC classification number: H03F3/45188 ,  H03F1/0266 ,  H03F3/45183 ,  H03F2200/18 ,  H03F2203/45292

    Abstract: Systems and methods may include an amplifier having at least a first input port, where the amplifier includes a first capacitance associated with the first input port; a first bias circuit, where the first bias circuit comprises a series connection of a first charging circuit and a first discharging circuit, wherein a first node between the first charging circuit and the first discharging circuit is connected to the first input port, wherein responsive to an RF input signal having at least a first predetermined level being received at the first input port, the first charging circuit charges the first capacitance associated with the first input port during a first portion of a cycle of the RF input signal, and discharges the first capacitance associated with the first input port during a second portion of the cycle, thereby controlling a DC bias voltage level available at the first input port.

    Abstract translation: 系统和方法可以包括具有至少第一输入端口的放大器，其中放大器包括与第一输入端口相关联的第一电容; 第一偏置电路，其中第一偏置电路包括第一充电电路和第一放电电路的串联连接，其中第一充电电路和第一放电电路之间的第一节点连接到第一输入端口，其中响应于 在第一输入端口处接收至少具有第一预定电平的RF输入信号，第一充电电路在RF输入信号的周期的第一部分期间对与第一输入端口相关联的第一电容充电，并且将第一 在周期的第二部分期间与第一输入端口相关联的电容，从而控制在第一输入端口处可用的DC偏置电压电平。

    Systems, methods, and apparatuses for complementary metal oxide semiconductor (CMOS) driver circuits using shared-charge recycling charge pump structures
    57.
    发明授权
    Systems, methods, and apparatuses for complementary metal oxide semiconductor (CMOS) driver circuits using shared-charge recycling charge pump structures 有权
    使用共享电荷循环电荷泵结构的互补金属氧化物半导体（CMOS）驱动电路的系统，方法和装置

    公开(公告)号：US08334708B1

    公开(公告)日：2012-12-18

    申请号：US13194315

    申请日：2011-07-29

    Applicant: Jeongwon Cha ,  Taejoong Song ,  Changhyuk Cho ,  Minsik Ahn ,  Chang-Ho Lee ,  Wangmyong Woo ,  Jae Joon Chang

    Inventor： Jeongwon Cha ,  Taejoong Song ,  Changhyuk Cho ,  Minsik Ahn ,  Chang-Ho Lee ,  Wangmyong Woo ,  Jae Joon Chang

    IPC: H03K19/00 ,  H03K19/02

    CPC classification number: H03K19/0019

    Abstract: Example driver circuits can utilize shared-charge recycling charge pump structures. In particular, an example shared-charge recycling process may be applied to a clock buffer and charge transfer cells of the charge pump in a driver circuit. An example recycling process may include recycling of shared charges between the capacitors/capacitances in the charge transfer cells. An example recycling process may use the charges in one or more capacitors to charge one or more other capacitors before the charges are wasted or otherwise discharged to ground. Such recycling may significantly reduce the power consumption of the charge pump while still providing a high output voltage level, according to an example embodiment of the invention.

    Abstract translation: 示例驱动电路可以利用共享电荷循环电荷泵结构。 特别地，示例性共享电荷回收过程可以应用于驱动器电路中的电荷泵的时钟缓冲器和电荷转移单元。 示例回收过程可以包括在电荷转移单元中的电容器/电容之间再循环共享电荷。 示例回收过程可以在一个或多个电容器中的电荷在电荷被浪费或以其它方式放电到地之前对一个或多个其它电容器充电。 根据本发明的示例性实施例，这种再循环可以显着降低电荷泵的功耗，同时仍然提供高输出电压电平。

    Systems and Methods for Wideband CMOS Voltage-Controlled Oscillators Using Reconfigurable Inductor Arrays
    58.
    发明申请
    Systems and Methods for Wideband CMOS Voltage-Controlled Oscillators Using Reconfigurable Inductor Arrays 审中-公开
    使用可重构电感阵列的宽带CMOS压控振荡器的系统和方法

    公开(公告)号：US20120286889A1

    公开(公告)日：2012-11-15

    申请号：US13104807

    申请日：2011-05-10

    Applicant: Yunseo Park ,  Jaejoon Kim ,  Chang-Ho Lee

    Inventor： Yunseo Park ,  Jaejoon Kim ,  Chang-Ho Lee

    IPC: H03B5/12

    CPC classification number: H03B5/1212 ,  H03B5/1228 ,  H03B5/1268

    Abstract: As wireless communication technology evolves, various transceivers become integrated into a single system, which implements a seamless connection to search available frequency bands and to provide wireless connections regardless of their wireless standards. One of the key technologies for seamless implementation is an ultra-wideband local oscillator, which can overcome the restriction of limited tuning range in typical RF local oscillators. Many RF oscillators incorporate LC-tuned oscillators because of their good noise performance while their tuning range is limited by fixed inductance and varied capacitance. The planar inductor fabricated on the CMOS process occupies a large area as well. By replacing the planar inductor with the array of bondwires, and including switches to provide proper impedance for the circuit to generate negative impedance, the tuning range of a CMOS voltage-controlled oscillator (VCO) is extended more than 100%, which number can not be achieved in a convention VCO.

    Abstract translation: 随着无线通信技术的发展，各种收发器被集成到单个系统中，其实现无缝连接以搜索可用的频带并提供无线连接，而不管其无线标准如何。 无缝实现的关键技术之一是超宽带本地振荡器，可以克服典型RF本地振荡器中限制调谐范围的限制。 许多射频振荡器由于其良好的噪声性能而集成了LC调谐振荡器，而其调谐范围受固定电感和变化的电容的限制。 在CMOS工艺上制造的平面电感也占据了大面积。 通过用键合线阵列替换平面电感器，并且包括开关以为电路产生负阻抗提供适当的阻抗，CMOS压控振荡器（VCO）的调谐范围扩展到100％以上，哪个数不能 在会议VCO中实现。

    Systems and methods for CMOS power amplifiers with power mode control
    59.
    发明授权
    Systems and methods for CMOS power amplifiers with power mode control 有权
    具有功率模式控制功能的CMOS功率放大器的系统和方法

    公开(公告)号：US08269561B1

    公开(公告)日：2012-09-18

    申请号：US13104898

    申请日：2011-05-10

    Applicant: Yunseo Park ,  Chang-Ho Lee

    Inventor： Yunseo Park ,  Chang-Ho Lee

    IPC: H03F3/04

    CPC classification number: H03F3/211 ,  H03F1/0277 ,  H03F1/565 ,  H03F3/195 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/405 ,  H03F2203/7203 ,  H03F2203/7221 ,  H03F2203/7233 ,  H03F2203/7236 ,  H03F2203/7239

    Abstract: Embodiments of the invention may provide CMOS power amplifiers with power mode control to provide the desired power-added efficiency (PAE), idle current, output power, and Adjacent Channel Leakage Ratio (ACLR). For instance, there may be a multi-mode WCDMA CMOS RF power amplifier having high/medium/low output power modes aimed to achieve high PAE and low idle current in a portable wireless environment. According to an example embodiment, a CMOS RF power amplifier may provide a plurality of separate signal paths for purposes of supporting multi-power modes. For example, there may be a first signal path which supports a high-power mode, and a second path which is subsequently divided into two recursive signal paths or sub-paths to support respective medium and low-power modes. One of the three power modes may be selected or controlled using bias control switches in the first and second paths.

    Abstract translation: 本发明的实施例可以提供具有功率模式控制的CMOS功率放大器，以提供期望的功率附加效率（PAE），空闲电流，输出功率和相邻通道泄漏比（ACLR）。 例如，可以存在具有高/中/低输出功率模式的多模WCDMA CMOS RF功率放大器，其旨在在便携式无线环境中实现高PAE和低空闲电流。 根据示例性实施例，CMOS RF功率放大器可以为支持多功率模式的目的提供多个单独的信号路径。 例如，可以存在支持高功率模式的第一信号路径和随后被分成两个递归信号路径或子路径以支持各种中等和低功率模式的第二路径。 可以使用第一和第二路径中的偏置控制开关来选择或控制三种功率模式中的一种。

    TESTING DEVICE, TEST SYSTEM INCLUDING THE SAME, AND METHOD THEREOF
    60.
    发明申请
    TESTING DEVICE, TEST SYSTEM INCLUDING THE SAME, AND METHOD THEREOF 有权
    测试装置，包括其的测试系统及其方法

    公开(公告)号：US20120150459A1

    公开(公告)日：2012-06-14

    申请号：US13310116

    申请日：2011-12-02

    Applicant: Yun-Cheol Kim ,  Chang-Ho Lee ,  Jin-Ho Choi ,  Min-Woo Kim

    Inventor： Yun-Cheol Kim ,  Chang-Ho Lee ,  Jin-Ho Choi ,  Min-Woo Kim

    IPC: G01R31/02 ,  G06F19/00

    CPC classification number: G01R31/2812 ,  G01R31/2813

    Abstract: A testing device includes a signal sensing unit and a signal processing unit. The signal sensing unit generates a test output signal by sensing a signal from a device under test including a plurality of passive elements that are connected in parallel. The signal processing unit detects an open-type fault of the plurality of passive elements by measuring an impedance of the device under test based on element characteristic information of the plurality of passive elements.

    Abstract translation: 测试装置包括信号感测单元和信号处理单元。 信号感测单元通过感测来自被测器件的信号产生测试输出信号，包括并联连接的多个无源元件。 信号处理单元通过基于多个无源元件的元件特性信息测量被测器件的阻抗来检测多个无源元件的开路型故障。

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