公开(公告)号：US10983412B1

公开(公告)日：2021-04-20

申请号：US16674711

申请日：2019-11-05

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Siva P. Adusumilli ,  John J. Ellis-Monaghan

IPC: G02F1/225 ,  G02F1/025 ,  G02F1/01 ,  G02B6/122 ,  H01L31/0232 ,  G02B6/12 ,  G02B6/136 ,  G02F1/21

Abstract: Structures including a photodetector and methods of fabricating such structures. A substrate, which is composed of a semiconductor material, includes a first trench, a second trench, and a pillar of the semiconductor material that is laterally positioned between the first trench and the second trench. A first portion of a dielectric layer is located in the first trench and a second portion of the dielectric layer is located in the second trench. A waveguide core is coupled to the pillar at a top surface of the substrate.

公开(公告)号：US12237407B2

公开(公告)日：2025-02-25

申请号：US17978633

申请日：2022-11-01

Applicant: GlobalFoundries U.S. Inc.

Inventor： Anupam Dutta ,  Rajendran Krishnasamy ,  Vvss Satyasuresh Choppalli ,  Vibhor Jain ,  Robert J. Gauthier, Jr.

IPC: H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a heterojunction bipolar transistor comprising a collector region, a base region and an emitter region; and at least one non-single-crystal semiconductor region in the collector region of the heterojunction bipolar transistor.

公开(公告)号：US20240427095A1

公开(公告)日：2024-12-26

申请号：US18338712

申请日：2023-06-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： Ravi Prakash Srivastava ,  Yusheng Bian ,  Vibhor Jain

IPC: G02B6/42

Abstract: Embodiments of the disclosure provide a multi-substrate coupling for photonic integrated circuits (PICs). Structures of the disclosure may include a first substrate having a first surface. The first surface includes a groove therein. A second substrate has a second surface coupled to the first surface. The second substrate includes a cavity substantially aligned with the groove of the first surface, and a photonic integrated circuit (PIC) structure horizontally distal to the cavity.

公开(公告)号：US20240250158A1

公开(公告)日：2024-07-25

申请号：US18438882

申请日：2024-02-12

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Judson R. Holt ,  Vibhor Jain ,  Alexander M. Derrickson

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/7393 ,  H01L29/0649 ,  H01L29/66325

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region; an emitter region on a first side of the extrinsic base region; a collector region on a second side of the extrinsic base region; and a gate structure comprising a gate oxide and a gate control in a same channel region as the extrinsic base region.

公开(公告)号：US20240136400A1

公开(公告)日：2024-04-25

申请号：US18405621

申请日：2024-01-05

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander Derrickson ,  Vibhor Jain ,  Judson R. Holt ,  Jagar Singh ,  Mankyu Yang

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/735 ,  H01L29/737

CPC classification number: H01L29/0821 ,  H01L29/0649 ,  H01L29/0808 ,  H01L29/0817 ,  H01L29/1008 ,  H01L29/41708 ,  H01L29/735 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor with gated collector and methods of manufacture. The structure includes: an extrinsic base region vertically over a semiconductor substrate and comprising asymmetrical sidewall spacers on opposing sidewalls of the extrinsic base region; a collector region on the semiconductor substrate and separated from the extrinsic base region by at least a first spacer of the asymmetrical sidewall spacers; and an emitter region on the semiconductor substrate and separated from the extrinsic base region by a second spacer of the asymmetrical sidewall spacers.

公开(公告)号：US11935928B2

公开(公告)日：2024-03-19

申请号：US17747476

申请日：2022-05-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Hong Yu ,  Jianwei Peng ,  Vibhor Jain

IPC: H01L29/417 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/737

CPC classification number: H01L29/41708 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/42304 ,  H01L29/66242 ,  H01L29/7371

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with self-aligned asymmetric spacer and methods of manufacture. The structure includes: a base formed on a semiconductor substrate; an asymmetrical spacer surrounding the base; an emitter on a first side of the base and separated from the base by the asymmetrical spacer; and a collector on a second side of the base and separated from the base by the asymmetrical spacer.

公开(公告)号：US20240088272A1

公开(公告)日：2024-03-14

申请号：US17931938

申请日：2022-09-14

Applicant: GlobalFoundries U.S. Inc.

Inventor： Shesh Mani Pandey ,  Vibhor Jain

IPC: H01L29/735 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/735 ,  H01L29/0808 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/6625

Abstract: Embodiments of the disclosure provide a bipolar transistor and gate structure on a semiconductor fin and methods to form the same. A structure according to the disclosure includes a semiconductor fin including an intrinsic base region and an extrinsic base region adjacent the intrinsic base region along a length of the semiconductor fin. Sidewalls of the intrinsic base region of the semiconductor fin are adjacent an emitter and a collector along a width of the semiconductor fin. A gate structure is on the semiconductor fin and between the intrinsic base region and the extrinsic base region.

公开(公告)号：US11901304B2

公开(公告)日：2024-02-13

申请号：US17323423

申请日：2021-05-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Sunil K. Singh ,  Vibhor Jain ,  Siva P. Adusumilli ,  Sebastian T. Ventrone ,  Johnatan A. Kantarovsky ,  Yves T. Ngu

IPC: H01L23/544 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L23/544 ,  H01L23/481 ,  H01L23/57 ,  H01L23/573 ,  H01L2223/5442 ,  H01L2223/54433

Abstract: The disclosure provides an integrated circuit (IC) structure with fluorescent materials, and related methods. An IC structure according to the disclosure may include a layer of fluorescent material on an IC component. The layer of fluorescent material defines a portion of an identification marker for the IC structure.

公开(公告)号：US20240021713A1

公开(公告)日：2024-01-18

申请号：US18373598

申请日：2023-09-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Alexander Derrickson ,  Jagar Singh ,  Vibhor Jain ,  Andreas Knorr ,  Alexander Martin ,  Judson R. Holt ,  Zhenyu Hu

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/737 ,  H01L29/08 ,  H01L29/417

CPC classification number: H01L29/735 ,  H01L29/6625 ,  H01L29/737 ,  H01L29/0808 ,  H01L29/41708 ,  H01L29/0821

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.

公开(公告)号：US11869958B2

公开(公告)日：2024-01-09

申请号：US17745280

申请日：2022-05-16

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Judson R. Holt ,  Shesh Mani Pandey ,  Vibhor Jain

IPC: H01L29/737 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/7371 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a collector in a semiconductor substrate; a subcollector in the semiconductor substrate; an intrinsic base over the subcollector; an extrinsic base adjacent to the intrinsic base; an emitter over the intrinsic base; and an isolation structure between the extrinsic base and the emitter and which overlaps the subcollector.