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111 条记录 (耗时 0.027 秒)

    Display apparatus and display device
    51.
    发明授权
    Display apparatus and display device 失效
    显示装置和显示装置

    公开(公告)号：US07355563B2

    公开(公告)日：2008-04-08

    申请号：US10761203

    申请日：2004-01-22

    申请人： Takuya Hata ,  Takashi Chuman ,  Yoshihiko Uchida ,  Hideo Satoh ,  Atsushi Yoshizawa

    发明人： Takuya Hata ,  Takashi Chuman ,  Yoshihiko Uchida ,  Hideo Satoh ,  Atsushi Yoshizawa

    IPC分类号： G09G5/00

    CPC分类号： H04N13/395

    摘要： A display apparatus (1) for generating a stereoscopic image by superimposing a plurality of images at a predetermined interval from each other on the view line of the viewer, the apparatus comprising: a first display unit (11) having a plurality of emission areas (11-1) for emitting a light, disposed in a discrete manner in a plane of a display screen and a plurality of transmission areas (11-2) for transmitting a light, disposed in a discrete manner in the plane of the display screen except for areas occupied by said plurality of emission areas; and a second display unit (12) disposed behind the first display unit as seen from the viewer.

    摘要翻译： 一种显示装置（1），用于通过在观看者的视线上以预定的间隔叠加多个图像来产生立体图像，该装置包括：第一显示单元（11），具有多个发射区域 用于发射以离散方式设置在显示屏的平面中的光，以及用于透射光的多个透射区域（11-2），其以离散的方式设置在显示屏的平面中，除了 对于由所述多个发射区域占据的区域; 以及从观看者观察时设置在第一显示单元后面的第二显示单元（12）。

    Dynamic flip-flop circuit
    52.
    发明申请
    Dynamic flip-flop circuit 失效
    动态触发电路

    公开(公告)号：US20070216460A1

    公开(公告)日：2007-09-20

    申请号：US11709770

    申请日：2007-02-23

    申请人： Atsushi Yoshizawa

    发明人： Atsushi Yoshizawa

    IPC分类号： H03K3/00

    CPC分类号： H03K5/15093 ,  H03K23/44 ,  H03K23/542

    摘要： A dynamic flip-flop circuit which outputs an output signal on which a digital data signal is reflected based on a clock, includes: a first control stage configured to output a signal having a level inverted from that of the digital data signal within a period within which the clock has a second level; a second control stage configured to output a signal of a first level within the period within which the clock has the second level and a signal of a level within another period within which the clock has the first level; a third control stage configured to output an output signal of the first level within a period within which the signal outputted from the second control stage has the second level; and a phase adjustment circuit configured to adjust the phase to produce a second clock and supply the second clock to the third control stage.

    摘要翻译： 输出基于时钟反映数字数据信号的输出信号的动态触发电路包括：第一控制级，被配置为在其内部的周期内输出具有与数字数据信号的电平相反的电平的信号 时钟有二级; 第二控制级，被配置为在所述时钟具有所述第二电平的时段内输出第一电平的信号，以及在所述时钟具有所述第一电平的另一周期内输出电平的信号; 第三控制级，被配置为在从第二控制级输出的信号具有第二级的时段内输出第一级的输出信号; 以及相位调整电路，被配置为调整相位以产生第二时钟并将第二时钟提供给第三控制级。

    Mobile communication terminal device and variable gain circuit
    53.
    发明授权
    Mobile communication terminal device and variable gain circuit 有权
    移动通信终端设备和可变增益电路

    公开(公告)号：US07149487B2

    公开(公告)日：2006-12-12

    申请号：US10740210

    申请日：2003-12-18

    申请人： Atsushi Yoshizawa

    发明人： Atsushi Yoshizawa

    IPC分类号： H04B1/06

    CPC分类号： H03G3/3078 ,  H04B1/109

    摘要： In receiver systems for cellular phones using the W-CDMA method, the change in DC voltage occurring when the gain of a programmable gain amplifier (PGA circuit) is switched to adjust the gain for a received signal, can be suppressed. A sample-and-hold circuit is installed containing a “sample” mode for directly outputting a signal from the PGA section and also containing a “hold” mode for outputting the electric charge of a specified voltage stored in a capacitor. This sample-and-hold circuit normally operates in “sample” mode so the output signal from the PGA section is directly output, but is operated in “hold” mode at the gain switching timing of the PGA circuit, so that the electric charge of the specified voltage stored in the capacitor is output for a specified length of time (equal to the time required for the DC voltage change to converge to a stable level).

    摘要翻译： 在使用W-CDMA方法的蜂窝电话的接收机系统中，可以抑制当可编程增益放大器（PGA电路）的增益被切换以调整接收信号的增益时发生的直流电压的变化。 安装采样保持电路，其包含用于直接从PGA部分输出信号的“采样”模式，并且还包含用于输出存储在电容器中的指定电压的电荷的“保持”模式。 该采样保持电路通常以“采样”模式工作，所以来自PGA部分的输出信号直接输出，但在PGA电路的增益切换时刻以“保持”模式运行，使得 输出存储在电容器中的指定电压达指定的时间长度（等于直流电压变化所需的时间收敛到稳定的电平）。

    Filter circuit
    55.
    发明授权
    Filter circuit 失效
    滤波电路

    公开(公告)号：US06369644B1

    公开(公告)日：2002-04-09

    申请号：US09219840

    申请日：1998-12-23

    申请人： Atsushi Yoshizawa

    发明人： Atsushi Yoshizawa

    IPC分类号： H03K500

    CPC分类号： H03G3/3052

    摘要： A filter circuit extracts a desired signal in the presence of interference by using a variable gain circuit whose input is the frequency converted received signal and whose output is fed through an active filter to produce the desired signal. The signal levels before and after the active filter are detected and the higher level is used to control the gain of the variable gain circuit.

    摘要翻译： 滤波器电路通过使用其输入为频率转换的接收信号的可变增益电路并且通过有源滤波器馈送以产生期望的信号而在存在干扰的情况下提取期望的信号。 检测有源滤波器之前和之后的信号电平，并使用较高电平来控制可变增益电路的增益。

    Transmitting apparatus and method of adjusting gain of signal to be transmitted, and receiving apparatus and method of adjusting gain of received signal
    57.
    发明授权
    Transmitting apparatus and method of adjusting gain of signal to be transmitted, and receiving apparatus and method of adjusting gain of received signal 失效
    发送装置和调整要发送的信号的增益的方法，以及接收装置和调整接收信号的增益的方法

    公开(公告)号：US5862461A

    公开(公告)日：1999-01-19

    申请号：US703214

    申请日：1996-08-26

    申请人： Atsushi Yoshizawa ,  Tomoya Yamaura ,  Norio Shimo

    发明人： Atsushi Yoshizawa ,  Tomoya Yamaura ,  Norio Shimo

    IPC分类号： H03G1/00 ,  H03G3/30 ,  H04B1/04

    CPC分类号： H03G1/0088 ,  H03G3/3042 ,  H03F2203/7236 ,  H03F2203/7239

    摘要： A transmitting apparatus which can suppress unnecessary power consumption. An optimal signal line is selected from a plurality of signal lines (53-56) having different gains provided by respective signal amplifying devices to perform gain adjustment on a signal to be transmitted, which is supplied to an input terminal (58), so as to optimize power consumption of each signal amplifying device in accordance with a gain value, and to halt the operation of the signal amplifying device on a signal line which is not selected. Therefore, unnecessary power consumption can be suppressed.

    摘要翻译： 一种能够抑制不必要的电力消耗的发送装置。 从具有由各个信号放大装置提供的不同增益的多个信号线（53-56）选择最佳信号线，以对提供给输入端（58）的待传输信号执行增益调整，以便 以根据增益值优化每个信号放大装置的功耗，并且在未选择的信号线上停止信号放大装置的操作。 因此，可以抑制不必要的电力消耗。

    Optical information recording medium
    58.
    发明授权
    Optical information recording medium 失效
    光信息记录介质

    公开(公告)号：US5225317A

    公开(公告)日：1993-07-06

    申请号：US914632

    申请日：1992-07-17

    申请人： Atsushi Yoshizawa

    发明人： Atsushi Yoshizawa

    IPC分类号： G11B7/244 ,  G11B7/245 ,  G11B7/26

    CPC分类号： G11B7/244 ,  G11B7/245 ,  G11B7/26 ,  G11B7/2531 ,  G11B7/2534 ,  Y10S430/146

    摘要： An optical information recording medium comprises resin-recording layers respectively made of polymers each carrying a dye. The layers are laminated on a substrate in such a manner that the first and second layer in the resin-recording layers directly adjoin each other. The first polymer constructing the first layer has a solubility to be insoluble to the second solvent capable of dissolving the second polymer constructing the second layer. The second polymer has a solubility to be insoluble to a first solvent capable of dissolving the first polymer.

    摘要翻译： 光学信息记录介质包括分别由携带染料的聚合物制成的树脂记录层。 这些层以这样的方式层压在基板上，使得树脂记录层中的第一层和第二层直接相邻。 构成第一层的第一聚合物具有不溶于能够溶解构成第二层的第二聚合物的第二溶剂的溶解性。 第二聚合物具有不溶于能够溶解第一聚合物的第一溶剂的溶解性。