公开(公告)号：US5563426A

公开(公告)日：1996-10-08

申请号：US341106

申请日：1994-11-18

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/76 ,  H01L27/108 ,  H01L29/04

CPC分类号： H01L29/66757 ,  H01L21/2022 ,  H01L27/1277 ,  G09G2300/0408

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜上或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下进行退火， 。 通过在要成为有源层的半导体层上选择性地形成覆盖膜，通过在构成具有薄膜晶体管的动态电路的同时获得泄漏电流低的晶体管和迁移率高的晶体管 晶体管，然后通过其热结晶。

公开(公告)号：US5403772A

公开(公告)日：1995-04-04

申请号：US160908

申请日：1993-12-03

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84

CPC分类号： H01L29/66757 ,  H01L21/2022 ,  H01L27/1277 ,  G09G2300/0408

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜的上方或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下退火进行其结晶化 。 通过在要成为有源层的半导体层上选择性地形成覆盖膜，通过在构成具有薄膜晶体管的动态电路的同时获得泄漏电流低的晶体管和迁移率高的晶体管 晶体管，然后通过其热结晶。

公开(公告)号：US08278660B2

公开(公告)日：2012-10-02

申请号：US13282515

申请日：2011-10-27

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

IPC分类号： H01L29/04

CPC分类号： H01L21/02672 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1251 ,  H01L27/1277 ,  H01L27/1281 ,  H01L29/66757

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor having low leak current and high mobility are obtained in the same time in a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜上或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下进行退火， 。 在具有薄膜晶体管的动态电路中同时获得具有低漏电流和高迁移率的晶体管，在半导体层上选择性地形成覆盖膜，半导体层将成为晶体管的有源层，并且之后将其热结晶 。

公开(公告)号：US06338991B1

公开(公告)日：2002-01-15

申请号：US09439997

申请日：1999-11-15

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

IPC分类号： H01L2184

CPC分类号： H01L21/02672 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1251 ,  H01L27/1277 ,  H01L27/1281 ,  H01L29/66757

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, parad.ium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成含有镍，铁，钴，钌，铑，锶，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金， ，银或硅化物以岛，线，条，点或膜的形式存在于非晶硅膜上或下方，并以它们为起始点，通过在低于正常结晶温度的温度下进行退火， 非晶硅。 通过在要成为有源层的半导体层上选择性地形成覆盖膜，通过在构成具有薄膜晶体管的动态电路的同时获得泄漏电流低的晶体管和迁移率高的晶体管 晶体管，然后通过其热结晶。

公开(公告)号：US5888857A

公开(公告)日：1999-03-30

申请号：US661013

申请日：1996-06-10

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L21/00 ,  H01L21/36

CPC分类号： H01L29/66757 ,  H01L21/2022 ,  H01L27/1277 ,  G09G2300/0408

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜上或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下进行退火， 。 通过在要成为有源层的半导体层上选择性地形成覆盖膜，通过在构成具有薄膜晶体管的动态电路的同时获得泄漏电流低的晶体管和迁移率高的晶体管 晶体管，然后通过其热结晶。

公开(公告)号：US5595923A

公开(公告)日：1997-01-21

申请号：US467986

申请日：1995-06-06

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Yasuhiko Takemura ,  Mutsuo Yamamoto

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Yasuhiko Takemura ,  Mutsuo Yamamoto

IPC分类号： G02F1/1362 ,  H01L21/20 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L27/12 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L27/1251 ,  H01L21/2022 ,  H01L21/8238 ,  H01L27/0922 ,  H01L27/1237 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78618 ,  H01L29/78675 ,  G02F1/13454 ,  Y10S148/016

摘要： A substance containing a catalyst element is formed so as to closely contact with an amorphous silicon film, or a catalyst element is introduced into the amorphous silicon film. The amorphous silicon film is annealed at a temperature which is lower than a crystallization temperature of usual amorphous silicon, thereby selectively crystallizing the amorphous silicon film. The crystallized region is used as a crystalline silicon TFT which can be used in a peripheral driver circuit of an active matrix circuit. The region which remains amorphous is used as an amorphous silicon TFT which can be used in a pixel circuit. A relatively small amount of a catalyst element for promoting crystallization is added to an amorphous silicon film, and an annealing process is conducted at a temperature which is lower than the distortion temperature of a substrate, thereby crystallizing the amorphous silicon film. A gate insulating film, and a gate electrode are then formed, and an impurity is implanted in a self-alignment manner. A film containing a catalyst element for promoting crystallization is closely contacted with the impurity region, or a relatively large amount of a catalyst element is introduced into the impurity region by an ion implantation or the like. Then, an annealing process is conducted at a temperature which is lower than the distortion temperature of the substrate, thereby activating the doping impurity.

摘要翻译： 形成含有催化剂元素的物质，以与非晶硅膜紧密接触，或将催化剂元素引入到非晶硅膜中。 非晶硅膜在比通常的非晶硅的结晶温度低的温度下退火，从而选择性地使非晶硅膜结晶。 结晶区域用作可用于有源矩阵电路的外围驱动电路的晶体硅T​​FT。 保持非晶形的区域用作可用于像素电路中的非晶硅TFT。 在非晶硅膜中添加相对少量的促进结晶的催化剂元素，并且在比基板的变形温度低的温度下进行退火处理，从而使非晶硅膜结晶。 然后形成栅极绝缘膜和栅电极，并以自对准的方式注入杂质。 含有促进结晶的催化剂元素的膜与杂质区紧密接触，或者通过离子注入等将相对大量的催化剂元素引入杂质区。 然后，在比基板的变形温度低的温度下进行退火处理，从而激活掺杂杂质。

公开(公告)号：US07622335B2

公开(公告)日：2009-11-24

申请号：US10926059

申请日：2004-08-26

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

IPC分类号： H01L21/00

CPC分类号： H01L21/02672 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1251 ,  H01L27/1277 ,  H01L27/1281 ,  H01L29/66757

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜上或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下进行退火， 。 通过在要成为有源层的半导体层上选择性地形成覆盖膜，通过在构成具有薄膜晶体管的动态电路的同时获得漏电流低的晶体管和迁移率高的晶体管 晶体管，然后通过其热结晶。

公开(公告)号：US06979840B1

公开(公告)日：2005-12-27

申请号：US08223823

申请日：1994-04-06

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Akira Mase ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Akira Mase ,  Hideki Uochi

IPC分类号： H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/13 ,  H01L29/04

CPC分类号： H01L29/66757 ,  H01L27/1255

摘要： A thin-film semiconductor device or integrated circuit comprising an insulating substrate, TFTs (thin-film transistors) formed on the substrate, and multilayer conductive interconnections. The circuit has a first metallization layer becoming gate electrodes and gate interconnections. The surface of the first metallization layer is oxidized by anodic oxidation to form an insulating coating on the surface of the first metallization layer. A second metallization layer becoming source and drain electrodes or conductive interconnections is then formed on the insulating coating directly or via an interlayer insulator. An improvement in the production yield and improved reliability are accomplished.

摘要翻译： 包括绝缘基板，形成在基板上的TFT（薄膜晶体管）和多层导电互连的薄膜半导体器件或集成电路。 该电路具有成为栅电极和栅极互连的第一金属化层。 通过阳极氧化将第一金属化层的表面氧化，以在第一金属化层的表面上形成绝缘涂层。 然后在绝缘涂层上直接或经由层间绝缘体形成成为源极和漏电极或导电互连的第二金属化层。 实现了产量的提高和可靠性的提高。

公开(公告)号：US5716871A

公开(公告)日：1998-02-10

申请号：US117709

申请日：1993-09-08

申请人： Shunpei Yamazaki ,  Akira Mase ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Shunpei Yamazaki ,  Akira Mase ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： G02F1/1362 ,  H01L21/336 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L21/44

CPC分类号： H01L29/66757 ,  H01L27/12 ,  H01L29/4908 ,  H01L29/78666 ,  H01L29/78675 ,  G02F1/13454 ,  G02F2001/136245

摘要： A semiconductor device or a semiconductor integrated circuit includes a field effect transistor having a source region, a drain region and a channel regions formed within a semiconductor substrate. A lower wiring is formed on the semiconductor substrate to form a gate electrode and its extension and oxidized to form an oxide film covering the lower wiring. An upper wiring is formed over the lower wiring on the semiconductor substrate to make contact with the drain or source region. The lower wiring is electrically insulated from the upper wiring by the oxide film.

摘要翻译： 半导体器件或半导体集成电路包括具有源极区，漏极区和形成在半导体衬底内的沟道区的场效应晶体管。 在半导体基板上形成下布线以形成栅电极，并且其延伸部被氧化以形成覆盖下布线的氧化膜。 在半导体衬底上的下布线之上形成上布线以与漏区或源区接触。 下布线通过氧化膜与上布线电绝缘。

公开(公告)号：US06004831A

公开(公告)日：1999-12-21

申请号：US862697

申请日：1997-05-23

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Akira Mase ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Akira Mase ,  Hideki Uochi

IPC分类号： H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/13 ,  H01L21/00 ,  H01L27/12

CPC分类号： H01L29/66757 ,  H01L27/1255

摘要： A thin-film semiconductor device or integrated circuit comprising an insulating substrate, TFTs (thin-film transistors) formed on the substrate, and multilayer conductive interconnections. The circuit has a first metallization layer becoming gate electrodes and gate interconnections. The surface of the first metallization layer is oxidized by anodic oxidation to form an insulating coating on the surface of the first metallization layer. A second metallization layer becoming source and drain electrodes or conductive interconnections is then formed on the insulating coating directly or via an interlayer insulator. An improvement in the production yield and improved reliability are accomplished.

摘要翻译： 包括绝缘基板，形成在基板上的TFT（薄膜晶体管）和多层导电布线的薄膜半导体器件或集成电路。 该电路具有成为栅电极和栅极互连的第一金属化层。 通过阳极氧化将第一金属化层的表面氧化，以在第一金属化层的表面上形成绝缘涂层。 然后在绝缘涂层上直接或经由层间绝缘体形成成为源极和漏电极或导电互连的第二金属化层。 实现了产量的提高和可靠性的提高。