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69 条记录 (耗时 0.024 秒)

    Methods of generating internal clock signals from external clock signals and of measuring the frequency of external clock signals and related frequency measuring circuits and semiconductor memory devices
    51.
    发明授权
    Methods of generating internal clock signals from external clock signals and of measuring the frequency of external clock signals and related frequency measuring circuits and semiconductor memory devices 失效
    从外部时钟信号产生内部时钟信号以及测量外部时钟信号和相关频率测量电路和半导体存储器件的频率的方法

    公开(公告)号：US07274185B2

    公开(公告)日：2007-09-25

    申请号：US11184616

    申请日：2005-07-19

    申请人： Hyun-Jin Kim

    发明人： Hyun-Jin Kim

    IPC分类号： G11C27/00 ,  H03D13/00 ,  G01R23/02

    CPC分类号： G11C7/22 ,  G11C7/222

    摘要： Pursuant to certain embodiments of the present invention, methods of generating an internal clock signal in a semiconductor memory device are provided in which the frequency of an external clock signal is measured. A CAS latency value of the semiconductor memory device is automatically set based at least in part on the measured frequency of the external clock signal. The automatically set CAS latency value is then used to generate the internal clock signal from the external clock signal. In these methods, the delay of a delay lock loop of the semiconductor memory device may be based at least in part on the automatically set CAS latency value. The internal clock signal may be generated from the external clock signal using the delay lock loop. Circuits and methods for measuring the frequency of the external clock signal are also provided.

    摘要翻译： 根据本发明的某些实施例，提供了在半导体存储器件中产生内部时钟信号的方法，其中测量外部时钟信号的频率。 至少部分地基于所测量的外部时钟信号的频率来自动设置半导体存储器件的CAS延迟值。 然后，自动设置CAS延迟值用于从外部时钟信号生成内部时钟信号。 在这些方法中，半导体存储器件的延迟锁定环的延迟可以至少部分地基于自动设置的CAS等待时间值。 可以使用延迟锁定环从外部时钟信号产生内部时钟信号。 还提供了用于测量外部时钟信号频率的电路和方法。

    Frequency measuring circuits including charge pumps and related memory devices and methods
    52.
    发明授权
    Frequency measuring circuits including charge pumps and related memory devices and methods 失效
    频率测量电路包括电荷泵和相关的存储器件和方法

    公开(公告)号：US07219026B2

    公开(公告)日：2007-05-15

    申请号：US11031104

    申请日：2005-01-07

    申请人： Hyun-Jin Kim ,  Sang-Bo Lee

    发明人： Hyun-Jin Kim ,  Sang-Bo Lee

    IPC分类号： G06F19/00

    CPC分类号： G11C7/22 ,  G11C7/16 ,  G11C7/222

    摘要： A frequency measuring circuit may include an edge detector, a charge pump, and an analog-to-digital (A/D) converter. The edge detector may be configured to generate an output pulse responsive to an edge of an input clock signal. The charge pump may be configured to generate an output signal responsive to the output pulse from the edge detector. The analog-to-digital (A/D) converter may be configured to convert the output signal into a digital value representing a frequency of the input clock signal. Related methods and integrated circuit memory devices are also discussed.

    摘要翻译： 频率测量电路可以包括边缘检测器，电荷泵和模数（A / D）转换器。 边缘检测器可以被配置为响应于输入时钟信号的边缘产生输出脉冲。 电荷泵可以被配置为响应于来自边缘检测器的输出脉冲而产生输出信号。 模拟数字（A / D）转换器可以被配置为将输出信号转换成表示输入时钟信号的频率的数字值。 还讨论了相关方法和集成电路存储器件。

    Light generating device, method of manufacturing the same, backlight assembly having the same and display device having the same
    53.
    发明申请
    Light generating device, method of manufacturing the same, backlight assembly having the same and display device having the same 审中-公开
    发光装置及其制造方法，具有该发光装置的背光组件及具有该发光装置的显示装置

    公开(公告)号：US20060087240A1

    公开(公告)日：2006-04-27

    申请号：US11189290

    申请日：2005-07-26

    申请人： Seok-Hyun Nam ,  Don-Chan Cho ,  Hyun-Jin Kim

    发明人： Seok-Hyun Nam ,  Don-Chan Cho ,  Hyun-Jin Kim

    IPC分类号： H01J65/00

    CPC分类号： H01J9/20 ,  H01J9/14 ,  H01J61/06 ,  H01J61/0672 ,  H01J61/35 ,  H01J65/046

    摘要： A light generating device includes a body, electrodes, and an adhesive member. Visible light is emitted from the body. The electrodes are disposed on an outer surface of the body. The adhesive member includes a first conductive adhesive layer and a second conductive adhesive layer. The first conductive adhesive layer is formed between the body and each of the electrodes and has a first conductive paste of a first viscosity. The second conductive adhesive layer is formed between each of the electrodes and the first conductive adhesive layer and has a second conductive paste of a second viscosity. The second viscosity is smaller than the first viscosity. The light generating device including the conductive adhesive member having double layers increases light generating efficiency and improves display quality of an image displayed from a display device. A backlight assembly and a display device incorporating the light generating device, and methods for manufacturing the light generating device are further described.

    摘要翻译： 发光装置包括主体，电极和粘合部件。 可见光从身体排出。 电极设置在主体的外表面上。 粘合剂构件包括第一导电粘合剂层和第二导电粘合剂层。 第一导电粘合剂层形成在主体和每个电极之间，并且具有第一粘度的第一导电膏。 第二导电粘合剂层形成在每个电极和第一导电粘合剂层之间，并具有第二粘度的第二导电糊。 第二粘度小于第一粘度。 包括具有双层的导电粘合构件的发光装置提高了发光效率并提高了从显示装置显示的图像的显示质量。 进一步描述背光组件和结合有发光装置的显示装置及其制造方法。

    Methods of generating internal clock signals from external clock signals and of measuring the frequency of external clock signals and related frequency measuring circuits and semiconductor memory devices
    54.
    发明申请
    Methods of generating internal clock signals from external clock signals and of measuring the frequency of external clock signals and related frequency measuring circuits and semiconductor memory devices 失效
    从外部时钟信号产生内部时钟信号以及测量外部时钟信号和相关频率测量电路和半导体存储器件的频率的方法

    公开(公告)号：US20060017429A1

    公开(公告)日：2006-01-26

    申请号：US11184616

    申请日：2005-07-19

    申请人： Hyun-Jin Kim

    发明人： Hyun-Jin Kim

    IPC分类号： G11C27/00

    CPC分类号： G11C7/22 ,  G11C7/222

    摘要： Pursuant to certain embodiments of the present invention, methods of generating an internal clock signal in a semiconductor memory device are provided in which the frequency of an external clock signal is measured. A CAS latency value of the semiconductor memory device is automatically set based at least in part on the measured frequency of the external clock signal. The automatically set CAS latency value is then used to generate the internal clock signal from the external clock signal. In these methods, the delay of a delay lock loop of the semiconductor memory device may be based at least in part on the automatically set CAS latency value. The internal clock signal may be generated from the external clock signal using the delay lock loop. Circuits and methods for measuring the frequency of the external clock signal are also provided.

    摘要翻译： 根据本发明的某些实施例，提供了在半导体存储器件中产生内部时钟信号的方法，其中测量外部时钟信号的频率。 至少部分地基于所测量的外部时钟信号的频率来自动设置半导体存储器件的CAS延迟值。 然后，自动设置CAS延迟值用于从外部时钟信号生成内部时钟信号。 在这些方法中，半导体存储器件的延迟锁定环的延迟可以至少部分地基于自动设置的CAS等待时间值。 可以使用延迟锁定环从外部时钟信号产生内部时钟信号。 还提供了用于测量外部时钟信号频率的电路和方法。

    Polymer for chemically amplified resist and a resist composition using the same
    55.
    发明授权
    Polymer for chemically amplified resist and a resist composition using the same 有权
    用于化学放大抗蚀剂的聚合物和使用其的抗蚀剂组合物

    公开(公告)号：US06767687B1

    公开(公告)日：2004-07-27

    申请号：US10070477

    申请日：2002-07-23

    申请人： Deog-Bae Kim ,  Hyun-Jin Kim ,  Yong-Joon Choi ,  Yoon-Sik Chung

    发明人： Deog-Bae Kim ,  Hyun-Jin Kim ,  Yong-Joon Choi ,  Yoon-Sik Chung

    IPC分类号： G03F7004

    CPC分类号： G03F7/039 ,  G03F7/0045 ,  Y10S430/115

    摘要： The present invention relates to a polymer for a chemically amplified resist and a resist composition using the same. The present invention provides a polymer represented by the Formula (1) and a chemically resist composition for extreme ultraviolet light comprising the same. The chemically amplified resist composition comprising the polymer represented by the formula (1) of the present invention responds to mono wavelength in a micro-lithography process and can embody a micro-pattern of high resolution on a substrate.

    摘要翻译： 本发明涉及一种用于化学放大抗蚀剂的聚合物和使用其的抗蚀剂组合物。 本发明提供由式（1）表示的聚合物和包含该聚合物的用于极紫外光的化学抗蚀剂组合物。 包含本发明的式（1）表示的聚合物的化学放大抗蚀剂组合物在微光刻工艺中响应于单波长，并​​且可以在衬底上体现高分辨率的微图案。