公开(公告)号：US08582386B2

公开(公告)日：2013-11-12

申请号：US13592902

申请日：2012-08-23

申请人： Sang-Jin Byeon

发明人： Sang-Jin Byeon

IPC分类号： G11C5/14

CPC分类号： G11C5/147

摘要： A semiconductor device including an internal voltage generator circuit that provides an internal voltage having a different level depending on the operation speed is provided. The semiconductor device includes an internal voltage generator circuit configured to receive operation speed information to generate an internal voltage having a different level depending on the operation speed; and an internal circuit operated using the internal voltage.

摘要翻译： 提供一种半导体器件，其包括内部电压发生器电路，其根据操作速度提供具有不同电平的内部电压。 半导体器件包括内部电压发生器电路，其被配置为接收操作速度信息以根据操作速度产生具有不同电平的内部电压; 以及使用内部电压工作的内部电路。

公开(公告)号：US08493133B2

公开(公告)日：2013-07-23

申请号：US12495005

申请日：2009-06-30

申请人： Sang-Jin Byeon

发明人： Sang-Jin Byeon

IPC分类号： G05F1/10 ,  G05F3/02

CPC分类号： G05F1/575

摘要： A semiconductor memory apparatus that generates a voltage by performing a pumping operation in response to an oscillator signal includes a driving voltage detecting unit configured to control the cycle of the oscillator signal in accordance with the level of a driving voltage that is used to perform the pumping operation.

摘要翻译： 通过响应振荡器信号进行泵浦动作而产生电压的半导体存储装置包括：驱动电压检测单元，被配置为根据用于执行泵浦的驱动电压的电平来控制振荡器信号的周期 操作。

公开(公告)号：US20120275251A1

公开(公告)日：2012-11-01

申请号：US13333941

申请日：2011-12-21

申请人： Sin-Hyun JIN ,  Sang-Jin Byeon

发明人： Sin-Hyun JIN ,  Sang-Jin Byeon

IPC分类号： G11C7/12 ,  G11C7/06

CPC分类号： G11C7/065 ,  G11C5/147 ,  G11C7/08 ,  G11C11/4074 ,  G11C11/4091

摘要： A semiconductor memory device includes a bit line sense amplification unit configured to sense/amplify data loaded on a bit line, and a driving control unit configured to supply a power line of the bit line sense amplification unit with an overdriving voltage in an overdriving period and supply an internal voltage line with a voltage of the power line of the bit line sense amplification unit in a discharge driving period.

摘要翻译： 一种半导体存储器件，包括：位线检测放大单元，被配置为感测/放大加载在位线上的数据;以及驱动控制单元，被配置为在过驱动周期内向所述位线检测放大单元的电源线提供过驱动电压;以及 在放电驱动期间内提供具有位线检测放大单元的电力线的电压的内部电压线。

公开(公告)号：US08248882B2

公开(公告)日：2012-08-21

申请号：US13108421

申请日：2011-05-16

申请人： Sang-Jin Byeon

发明人： Sang-Jin Byeon

IPC分类号： G11C5/14

CPC分类号： G11C29/12 ,  G11C5/143 ,  G11C29/12005 ,  G11C2029/0407

摘要： In an apparatus for generating a power-up signal, a mode register set (MRS) and other circuits are prevented from being reset, thereby providing stable circuit operation. A final power-up signal is not disabled even though an internal voltage generating unit is turned off at a test mode. The apparatus includes a power-up signal generator for producing a power-up signal; a multiplexing unit for selectively outputting the power-up signal or a static voltage signal in a test mode; and a power-up signal generator for producing a final power-up signal in response to the power-up signal of the power-up signal generator and an output signal of the multiplexing unit as the final power-up signal.

摘要翻译： 在用于产生上电信号的装置中，防止模式寄存器组（MRS）和其它电路被复位，从而提供稳定的电路操作。 即使在测试模式下内部电压产生单元被关闭，最终的上电信号也不会被禁止。 该装置包括用于产生上电信号的上电信号发生器; 复用单元，用于在测试模式中选择性地输出上电信号或静态电压信号; 以及上电信号发生器，用于响应于上电信号发生器的上电信号和多路复用单元的输出信号作为最终上电信号产生最终上电信号。

公开(公告)号：US08139422B2

公开(公告)日：2012-03-20

申请号：US12494831

申请日：2009-06-30

申请人： Sang-Jin Byeon

发明人： Sang-Jin Byeon

IPC分类号： G11C7/00

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/1084 ,  H03K19/018521

摘要： A buffer circuit of a semiconductor memory apparatus includes a compensation voltage generation unit configured to generate a compensation voltage in response to a level of a reference voltage; and a buffering unit configured to generate an output signal by buffering an input signal depending on the reference voltage and control a transition section of the output signal depending on a level of the compensation voltage.

摘要翻译： 半导体存储装置的缓冲电路包括：补偿电压生成单元，被配置为响应于参考电压的电平产生补偿电压; 以及缓冲单元，被配置为通过根据参考电压缓冲输入信号来产生输出信号，并且根据补偿电压的电平来控制输出信号的转换部分。

公开(公告)号：US08050113B2

公开(公告)日：2011-11-01

申请号：US13023739

申请日：2011-02-09

申请人： Sang-Jin Byeon

发明人： Sang-Jin Byeon

IPC分类号： G11C7/00 ,  G11C7/04 ,  G11C5/14

CPC分类号： G11C7/04 ,  G11C5/147 ,  G11C7/08 ,  G11C11/4074 ,  G11C11/4091

摘要： A core voltage discharger is capable of adjusting an amount of a current discharged according to temperature. The discharger for decreasing a level of a predetermined voltage receives temperature information from an on die thermal sensor and discharges a different amount of current in response to the temperature information.

摘要翻译： 核心电压放电器能够根据温度调节放电的电流量。 用于降低预定电压的电平的放电器接收来自管芯热传感器的温度信息，并且响应于温度信息而放电不同量的电流。

公开(公告)号：US20110221508A1

公开(公告)日：2011-09-15

申请号：US13110669

申请日：2011-05-18

申请人： Khil-Ohk KANG ,  Sang-Jin Byeon

发明人： Khil-Ohk KANG ,  Sang-Jin Byeon

IPC分类号： H03K3/42 ,  G05F1/10

CPC分类号： G05F3/30 ,  G11C5/143 ,  G11C5/147 ,  G11C7/04

摘要： A semiconductor device includes: a first reference voltage generator for generating a first reference voltage; a first band gap circuit for dividing a voltage at a second reference voltage output node to produce a first and a second band gap voltages having a property relative to temperature variations; a first comparator for receiving the first reference voltage as a bias input and comparing the first band gap voltage with the second band gap voltage; and a first driver for pull-up driving the second reference voltage output node in response to an output signal of the first comparator.

摘要翻译： 半导体器件包括：用于产生第一参考电压的第一参考电压发生器; 第一带隙电路，用于分割第二参考电压输出节点处的电压，以产生具有相对于温度变化的性质的第一和第二带隙电压; 第一比较器，用于接收第一参考电压作为偏置输入，并将第一带隙电压与第二带隙电压进行比较; 以及用于响应于第一比较器的输出信号上拉驱动第二参考电压输出节点的第一驱动器。

公开(公告)号：US07969136B2

公开(公告)日：2011-06-28

申请号：US11987936

申请日：2007-12-06

申请人： Khil-Ohk Kang ,  Sang-Jin Byeon

发明人： Khil-Ohk Kang ,  Sang-Jin Byeon

IPC分类号： G05F3/30

CPC分类号： G05F3/30 ,  G11C5/143 ,  G11C5/147 ,  G11C7/04

摘要： A semiconductor device includes: a first reference voltage generator for generating a first reference voltage; a first band gap circuit for dividing a voltage at a second reference voltage output node to produce a first and a second band gap voltages having a property relative to temperature variations; a first comparator for receiving the first reference voltage as a bias input and comparing the first band gap voltage with the second band gap voltage; and a first driver for pull-up driving the second reference voltage output node in response to an output signal of the first comparator.

摘要翻译： 半导体器件包括：用于产生第一参考电压的第一参考电压发生器; 第一带隙电路，用于分割第二参考电压输出节点处的电压，以产生具有相对于温度变化的性质的第一和第二带隙电压; 第一比较器，用于接收第一参考电压作为偏置输入，并将第一带隙电压与第二带隙电压进行比较; 以及用于响应于第一比较器的输出信号上拉驱动第二参考电压输出节点的第一驱动器。

公开(公告)号：US07733132B2

公开(公告)日：2010-06-08

申请号：US12082066

申请日：2008-04-07

申请人： Sang-Jin Byeon

发明人： Sang-Jin Byeon

IPC分类号： H03K5/153

CPC分类号： G11C7/04 ,  G11C5/147 ,  G11C11/4074 ,  G11C11/4078

摘要： There is provided a bulk bias voltage VBB level detector in a semiconductor memory device capable of improving tWR fail generated at a low temperature by compensating a temperature variance. The VBB level detector includes A bulk bias voltage level detector in a semiconductor memory device, comprising: a voltage divider for generating detection voltage based on an inputted bulk voltage; and a CMOS circuit for generating a output signal having predetermined logic value determined by the detection voltage wherein the voltage divider includes a first transistor having a gate coupled to a ground voltage and a second transistor having a gate coupled to an internal power voltage and a bulk coupled to the inputted bulk voltage.

摘要翻译： 在半导体存储器件中提供体偏置电压VBB电平检测器，其能够通过补偿温度变化来改善在低温下产生的tWR故障。 VBB电平检测器包括半导体存储器件中的体积偏置电压电平检测器，包括：分压器，用于基于输入的体电压产生检测电压; 以及CMOS电路，用于产生具有由检测电压确定的预定逻辑值的输出信号，其中分压器包括具有耦合到接地电压的栅极的第一晶体管和具有耦合到内部电源电压的栅极的第二晶体管， 耦合到输入的体电压。

公开(公告)号：US20080285356A1

公开(公告)日：2008-11-20

申请号：US12219572

申请日：2008-07-24

申请人： Sang-Jin Byeon ,  Kang-Seol Lee

发明人： Sang-Jin Byeon ,  Kang-Seol Lee

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C7/12 ,  G11C7/06

摘要： A semiconductor memory device employs a clamp for preventing latch up. For the purpose, the semiconductor memory device includes a precharging/equalizing unit for precharging and equalizing a pair of bit lines, and a control signal generating unit for producing a control signal which controls enable and disable of the precharging/equalizing unit, wherein the control signal generating unit includes a clamping unit to clamp its source voltage to a voltage level lower than that of its bulk bias.